Kacper
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4318a5b70b
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CPU completed
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2020-06-04 16:33:27 +01:00 |
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Aadi Desai
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12bd671c00
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Merge branch 'master' of https://github.com/supleed2/CPUProject
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2020-06-04 15:05:17 +01:00 |
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Aadi Desai
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08a8635959
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Updated ALU to use internal carry register
Also tidied up begin/end tags to reduce number of lines and improve readability
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2020-06-04 15:05:13 +01:00 |
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Benjamin Ramhorst
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f8edff65a1
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Merge branch 'master' of https://github.com/supleed2/CPUProject
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2020-06-04 00:36:27 +01:00 |
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Benjamin Ramhorst
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09dd851499
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Completed source code for generating .mif files from opcodes and registers
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2020-06-04 00:36:11 +01:00 |
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Aadi Desai
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3647e0b15c
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ALU now uses multiply block rather than * operator
Updated to use custom block and decide which step of MUL, MLA and MLS depending on exec2 input
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2020-06-03 15:15:44 +01:00 |
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Kacper
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1c0032fa95
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Fixed decoder and SM
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2020-06-02 20:09:22 +01:00 |
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Aadi Desai
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e1d7bf884d
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Merge branch 'master' of https://github.com/supleed2/CPUProject
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2020-06-02 16:58:04 +01:00 |
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Aadi Desai
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2ca1e90a2c
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ALU enable control added, minor fix with RRC
Multiply still to be updated
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2020-06-02 16:57:58 +01:00 |
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ben
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5d6c9803fc
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Implemented multiplication fully. 16 bits and 8 bits multiplier circuits available
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2020-05-29 09:47:44 -07:00 |
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Aadi Desai
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3f0c91b0ff
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Initial ALU Verilog
Currently using incorrect implementation for Multiply (* operator), to be fixed once Multiply method is decided
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2020-05-29 14:16:02 +01:00 |
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Benjamin Ramhorst
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fedfcaaada
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Added most of the code for generating the instruction MIF. Still need to do a big if-else statement for every instruction.
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2020-05-28 14:42:02 -07:00 |
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ben
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3d6e456fcc
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Almost completed 16 bit multiplier.
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2020-05-28 15:02:22 -07:00 |
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ben
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e39d2f653a
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Started working on the multiply block. Added absolute value block.
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2020-05-28 09:11:14 -07:00 |
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Kacper
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132e1ad7fe
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Delete DECODE.v.bak
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2020-05-27 18:59:12 +01:00 |
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Kacper
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cf179ad2cf
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Revisions for testing
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2020-05-27 18:53:59 +01:00 |
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Kacper
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e1acb56b66
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Finished decoder
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2020-05-27 18:53:03 +01:00 |
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Kacper
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1747e0c0b2
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Delete cbx_args.txt
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2020-05-27 11:10:59 +01:00 |
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Kacper
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5ed70dabb0
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Working on datapath
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2020-05-27 11:10:13 +01:00 |
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Benjamin Ramhorst
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9db1fb0af6
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Added the look-up table and the code used to generate it
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2020-05-25 22:47:29 +01:00 |
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Kacper
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3b298e02a2
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Finished datapath
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2020-05-25 18:00:34 +01:00 |
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Kacper
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6b2363d6a1
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Working on initial design
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2020-05-25 17:16:24 +01:00 |
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Benjamin
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14418c8725
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VCS Test
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2020-05-20 19:24:20 +01:00 |
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Aadi Desai
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26c28a829d
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Basic Project Setup
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2020-05-20 12:44:57 +01:00 |
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Aadi Desai
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29cb9493a1
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Add gitignore for quartus
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2020-05-20 12:08:03 +01:00 |
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Aadi Desai
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d86f15262c
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Initial commit
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2020-05-20 12:05:19 +01:00 |
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