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https://github.com/supleed2/ELEC40006-P1-CW.git
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Finished datapath
This commit is contained in:
parent
6b2363d6a1
commit
3b298e02a2
1214
CPUProject.bdf
1214
CPUProject.bdf
File diff suppressed because it is too large
Load diff
|
@ -38,17 +38,18 @@
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|||
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set_global_assignment -name FAMILY "Cyclone IV E"
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set_global_assignment -name DEVICE AUTO
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set_global_assignment -name TOP_LEVEL_ENTITY reg_file
|
||||
set_global_assignment -name TOP_LEVEL_ENTITY CPUProject
|
||||
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 18.1.0
|
||||
set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:38:11 MAY 20, 2020"
|
||||
set_global_assignment -name LAST_QUARTUS_VERSION "18.1.0 Standard Edition"
|
||||
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
|
||||
set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS ON
|
||||
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
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||||
set_global_assignment -name BDF_FILE CPUProject.bdf
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||||
set_global_assignment -name BDF_FILE reg_file.bdf
|
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set_global_assignment -name BDF_FILE mux_8x16.bdf
|
||||
set_global_assignment -name QIP_FILE ram_data.qip
|
||||
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
|
||||
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
|
||||
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
|
||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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||||
set_global_assignment -name BDF_FILE CPUProject.bdf
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set_global_assignment -name BDF_FILE reg_file.bdf
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set_global_assignment -name BDF_FILE mux_8x16.bdf
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||||
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
BIN
CPUProject.qws
BIN
CPUProject.qws
Binary file not shown.
16
greybox_tmp/cbx_args.txt
Normal file
16
greybox_tmp/cbx_args.txt
Normal file
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@ -0,0 +1,16 @@
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CLOCK_ENABLE_INPUT_A=BYPASS
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CLOCK_ENABLE_OUTPUT_A=BYPASS
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INTENDED_DEVICE_FAMILY="Cyclone IV E"
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NUMWORDS_A=2048
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OPERATION_MODE=SINGLE_PORT
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OUTDATA_ACLR_A=NONE
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OUTDATA_REG_A=UNREGISTERED
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POWER_UP_UNINITIALIZED=FALSE
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READ_DURING_WRITE_MODE_PORT_A=NEW_DATA_NO_NBE_READ
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||||
WIDTHAD_A=11
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||||
WIDTH_A=16
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WIDTH_BYTEENA_A=1
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DEVICE_FAMILY="Cyclone IV E"
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address_a
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clock0
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q_a
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105
ram_data.bsf
Normal file
105
ram_data.bsf
Normal file
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@ -0,0 +1,105 @@
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|||
/*
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||||
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||
editor if you plan to continue editing the block that represents it in
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||||
the Block Editor! File corruption is VERY likely to occur.
|
||||
*/
|
||||
/*
|
||||
Copyright (C) 2018 Intel Corporation. All rights reserved.
|
||||
Your use of Intel Corporation's design tools, logic functions
|
||||
and other software and tools, and its AMPP partner logic
|
||||
functions, and any output files from any of the foregoing
|
||||
(including device programming or simulation files), and any
|
||||
associated documentation or information are expressly subject
|
||||
to the terms and conditions of the Intel Program License
|
||||
Subscription Agreement, the Intel Quartus Prime License Agreement,
|
||||
the Intel FPGA IP License Agreement, or other applicable license
|
||||
agreement, including, without limitation, that your use is for
|
||||
the sole purpose of programming logic devices manufactured by
|
||||
Intel and sold by Intel or its authorized distributors. Please
|
||||
refer to the applicable agreement for further details.
|
||||
*/
|
||||
(header "symbol" (version "1.2"))
|
||||
(symbol
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||||
(rect 0 0 216 128)
|
||||
(text "ram_data" (rect 81 0 144 16)(font "Arial" (font_size 10)))
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||||
(text "inst" (rect 8 112 25 124)(font "Arial" ))
|
||||
(port
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||||
(pt 0 32)
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||||
(input)
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||||
(text "data[15..0]" (rect 0 0 60 14)(font "Arial" (font_size 8)))
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||||
(text "data[15..0]" (rect 4 18 53 31)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 32)(pt 88 32)(line_width 3))
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)
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||||
(port
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||||
(pt 0 48)
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||||
(input)
|
||||
(text "wren" (rect 0 0 30 14)(font "Arial" (font_size 8)))
|
||||
(text "wren" (rect 4 34 28 47)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 48)(pt 88 48))
|
||||
)
|
||||
(port
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||||
(pt 0 64)
|
||||
(input)
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||||
(text "address[10..0]" (rect 0 0 82 14)(font "Arial" (font_size 8)))
|
||||
(text "address[10..0]" (rect 4 50 72 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 64)(pt 88 64)(line_width 3))
|
||||
)
|
||||
(port
|
||||
(pt 0 112)
|
||||
(input)
|
||||
(text "clock" (rect 0 0 29 14)(font "Arial" (font_size 8)))
|
||||
(text "clock" (rect 4 98 27 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 112)(pt 80 112))
|
||||
)
|
||||
(port
|
||||
(pt 216 32)
|
||||
(output)
|
||||
(text "q[15..0]" (rect 0 0 42 14)(font "Arial" (font_size 8)))
|
||||
(text "q[15..0]" (rect 177 18 211 31)(font "Arial" (font_size 8)))
|
||||
(line (pt 216 32)(pt 136 32)(line_width 3))
|
||||
)
|
||||
(drawing
|
||||
(text "16 bits" (rect 109 24 194 159)(font "Arial" )(vertical))
|
||||
(text "2048 words" (rect 120 12 214 177)(font "Arial" )(vertical))
|
||||
(text "Block type: AUTO" (rect 48 114 170 239)(font "Arial" ))
|
||||
(line (pt 104 24)(pt 136 24))
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||||
(line (pt 136 24)(pt 136 96))
|
||||
(line (pt 136 96)(pt 104 96))
|
||||
(line (pt 104 96)(pt 104 24))
|
||||
(line (pt 118 58)(pt 123 63))
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||||
(line (pt 118 62)(pt 123 57))
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||||
(line (pt 88 27)(pt 96 27))
|
||||
(line (pt 96 27)(pt 96 39))
|
||||
(line (pt 96 39)(pt 88 39))
|
||||
(line (pt 88 39)(pt 88 27))
|
||||
(line (pt 88 34)(pt 90 36))
|
||||
(line (pt 90 36)(pt 88 38))
|
||||
(line (pt 80 36)(pt 88 36))
|
||||
(line (pt 96 32)(pt 104 32)(line_width 3))
|
||||
(line (pt 88 43)(pt 96 43))
|
||||
(line (pt 96 43)(pt 96 55))
|
||||
(line (pt 96 55)(pt 88 55))
|
||||
(line (pt 88 55)(pt 88 43))
|
||||
(line (pt 88 50)(pt 90 52))
|
||||
(line (pt 90 52)(pt 88 54))
|
||||
(line (pt 80 52)(pt 88 52))
|
||||
(line (pt 96 48)(pt 104 48))
|
||||
(line (pt 88 59)(pt 96 59))
|
||||
(line (pt 96 59)(pt 96 71))
|
||||
(line (pt 96 71)(pt 88 71))
|
||||
(line (pt 88 71)(pt 88 59))
|
||||
(line (pt 88 66)(pt 90 68))
|
||||
(line (pt 90 68)(pt 88 70))
|
||||
(line (pt 80 68)(pt 88 68))
|
||||
(line (pt 96 64)(pt 104 64)(line_width 3))
|
||||
(line (pt 80 112)(pt 80 36))
|
||||
(line (pt 0 0)(pt 217 0))
|
||||
(line (pt 217 0)(pt 217 130))
|
||||
(line (pt 0 130)(pt 217 130))
|
||||
(line (pt 0 0)(pt 0 130))
|
||||
(line (pt 0 0)(pt 0 0))
|
||||
(line (pt 0 0)(pt 0 0))
|
||||
(line (pt 0 0)(pt 0 0))
|
||||
(line (pt 0 0)(pt 0 0))
|
||||
)
|
||||
)
|
6
ram_data.qip
Normal file
6
ram_data.qip
Normal file
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@ -0,0 +1,6 @@
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|||
set_global_assignment -name IP_TOOL_NAME "RAM: 1-PORT"
|
||||
set_global_assignment -name IP_TOOL_VERSION "18.1"
|
||||
set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}"
|
||||
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "ram_data.v"]
|
||||
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "ram_data.bsf"]
|
||||
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "ram_data_bb.v"]
|
172
ram_data.v
Normal file
172
ram_data.v
Normal file
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@ -0,0 +1,172 @@
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|||
// megafunction wizard: %RAM: 1-PORT%
|
||||
// GENERATION: STANDARD
|
||||
// VERSION: WM1.0
|
||||
// MODULE: altsyncram
|
||||
|
||||
// ============================================================
|
||||
// File Name: ram_data.v
|
||||
// Megafunction Name(s):
|
||||
// altsyncram
|
||||
//
|
||||
// Simulation Library Files(s):
|
||||
// altera_mf
|
||||
// ============================================================
|
||||
// ************************************************************
|
||||
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
|
||||
//
|
||||
// 18.1.0 Build 625 09/12/2018 SJ Standard Edition
|
||||
// ************************************************************
|
||||
|
||||
|
||||
//Copyright (C) 2018 Intel Corporation. All rights reserved.
|
||||
//Your use of Intel Corporation's design tools, logic functions
|
||||
//and other software and tools, and its AMPP partner logic
|
||||
//functions, and any output files from any of the foregoing
|
||||
//(including device programming or simulation files), and any
|
||||
//associated documentation or information are expressly subject
|
||||
//to the terms and conditions of the Intel Program License
|
||||
//Subscription Agreement, the Intel Quartus Prime License Agreement,
|
||||
//the Intel FPGA IP License Agreement, or other applicable license
|
||||
//agreement, including, without limitation, that your use is for
|
||||
//the sole purpose of programming logic devices manufactured by
|
||||
//Intel and sold by Intel or its authorized distributors. Please
|
||||
//refer to the applicable agreement for further details.
|
||||
|
||||
|
||||
// synopsys translate_off
|
||||
`timescale 1 ps / 1 ps
|
||||
// synopsys translate_on
|
||||
module ram_data (
|
||||
address,
|
||||
clock,
|
||||
data,
|
||||
wren,
|
||||
q);
|
||||
|
||||
input [10:0] address;
|
||||
input clock;
|
||||
input [15:0] data;
|
||||
input wren;
|
||||
output [15:0] q;
|
||||
`ifndef ALTERA_RESERVED_QIS
|
||||
// synopsys translate_off
|
||||
`endif
|
||||
tri1 clock;
|
||||
`ifndef ALTERA_RESERVED_QIS
|
||||
// synopsys translate_on
|
||||
`endif
|
||||
|
||||
wire [15:0] sub_wire0;
|
||||
wire [15:0] q = sub_wire0[15:0];
|
||||
|
||||
altsyncram altsyncram_component (
|
||||
.address_a (address),
|
||||
.clock0 (clock),
|
||||
.data_a (data),
|
||||
.wren_a (wren),
|
||||
.q_a (sub_wire0),
|
||||
.aclr0 (1'b0),
|
||||
.aclr1 (1'b0),
|
||||
.address_b (1'b1),
|
||||
.addressstall_a (1'b0),
|
||||
.addressstall_b (1'b0),
|
||||
.byteena_a (1'b1),
|
||||
.byteena_b (1'b1),
|
||||
.clock1 (1'b1),
|
||||
.clocken0 (1'b1),
|
||||
.clocken1 (1'b1),
|
||||
.clocken2 (1'b1),
|
||||
.clocken3 (1'b1),
|
||||
.data_b (1'b1),
|
||||
.eccstatus (),
|
||||
.q_b (),
|
||||
.rden_a (1'b1),
|
||||
.rden_b (1'b1),
|
||||
.wren_b (1'b0));
|
||||
defparam
|
||||
altsyncram_component.clock_enable_input_a = "BYPASS",
|
||||
altsyncram_component.clock_enable_output_a = "BYPASS",
|
||||
altsyncram_component.intended_device_family = "Cyclone IV E",
|
||||
altsyncram_component.lpm_hint = "ENABLE_RUNTIME_MOD=NO",
|
||||
altsyncram_component.lpm_type = "altsyncram",
|
||||
altsyncram_component.numwords_a = 2048,
|
||||
altsyncram_component.operation_mode = "SINGLE_PORT",
|
||||
altsyncram_component.outdata_aclr_a = "NONE",
|
||||
altsyncram_component.outdata_reg_a = "UNREGISTERED",
|
||||
altsyncram_component.power_up_uninitialized = "FALSE",
|
||||
altsyncram_component.read_during_write_mode_port_a = "NEW_DATA_NO_NBE_READ",
|
||||
altsyncram_component.widthad_a = 11,
|
||||
altsyncram_component.width_a = 16,
|
||||
altsyncram_component.width_byteena_a = 1;
|
||||
|
||||
|
||||
endmodule
|
||||
|
||||
// ============================================================
|
||||
// CNX file retrieval info
|
||||
// ============================================================
|
||||
// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: AclrAddr NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: AclrByte NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: AclrData NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: AclrOutput NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8"
|
||||
// Retrieval info: PRIVATE: BlankMemory NUMERIC "1"
|
||||
// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: Clken NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: DataBusSeparated NUMERIC "1"
|
||||
// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_A"
|
||||
// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
|
||||
// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: JTAG_ID STRING "NONE"
|
||||
// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: MIFfilename STRING ""
|
||||
// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC "2048"
|
||||
// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC "3"
|
||||
// Retrieval info: PRIVATE: RegAddr NUMERIC "1"
|
||||
// Retrieval info: PRIVATE: RegData NUMERIC "1"
|
||||
// Retrieval info: PRIVATE: RegOutput NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
|
||||
// Retrieval info: PRIVATE: SingleClock NUMERIC "1"
|
||||
// Retrieval info: PRIVATE: UseDQRAM NUMERIC "1"
|
||||
// Retrieval info: PRIVATE: WRCONTROL_ACLR_A NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: WidthAddr NUMERIC "11"
|
||||
// Retrieval info: PRIVATE: WidthData NUMERIC "16"
|
||||
// Retrieval info: PRIVATE: rden NUMERIC "0"
|
||||
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
|
||||
// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS"
|
||||
// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS"
|
||||
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
|
||||
// Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=NO"
|
||||
// Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram"
|
||||
// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "2048"
|
||||
// Retrieval info: CONSTANT: OPERATION_MODE STRING "SINGLE_PORT"
|
||||
// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE"
|
||||
// Retrieval info: CONSTANT: OUTDATA_REG_A STRING "UNREGISTERED"
|
||||
// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING "FALSE"
|
||||
// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING "NEW_DATA_NO_NBE_READ"
|
||||
// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "11"
|
||||
// Retrieval info: CONSTANT: WIDTH_A NUMERIC "16"
|
||||
// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1"
|
||||
// Retrieval info: USED_PORT: address 0 0 11 0 INPUT NODEFVAL "address[10..0]"
|
||||
// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC "clock"
|
||||
// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL "data[15..0]"
|
||||
// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL "q[15..0]"
|
||||
// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT NODEFVAL "wren"
|
||||
// Retrieval info: CONNECT: @address_a 0 0 11 0 address 0 0 11 0
|
||||
// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0
|
||||
// Retrieval info: CONNECT: @data_a 0 0 16 0 data 0 0 16 0
|
||||
// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0
|
||||
// Retrieval info: CONNECT: q 0 0 16 0 @q_a 0 0 16 0
|
||||
// Retrieval info: GEN_FILE: TYPE_NORMAL ram_data.v TRUE
|
||||
// Retrieval info: GEN_FILE: TYPE_NORMAL ram_data.inc FALSE
|
||||
// Retrieval info: GEN_FILE: TYPE_NORMAL ram_data.cmp FALSE
|
||||
// Retrieval info: GEN_FILE: TYPE_NORMAL ram_data.bsf TRUE
|
||||
// Retrieval info: GEN_FILE: TYPE_NORMAL ram_data_inst.v FALSE
|
||||
// Retrieval info: GEN_FILE: TYPE_NORMAL ram_data_bb.v TRUE
|
||||
// Retrieval info: LIB_FILE: altera_mf
|
123
ram_data_bb.v
Normal file
123
ram_data_bb.v
Normal file
|
@ -0,0 +1,123 @@
|
|||
// megafunction wizard: %RAM: 1-PORT%VBB%
|
||||
// GENERATION: STANDARD
|
||||
// VERSION: WM1.0
|
||||
// MODULE: altsyncram
|
||||
|
||||
// ============================================================
|
||||
// File Name: ram_data.v
|
||||
// Megafunction Name(s):
|
||||
// altsyncram
|
||||
//
|
||||
// Simulation Library Files(s):
|
||||
// altera_mf
|
||||
// ============================================================
|
||||
// ************************************************************
|
||||
// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
|
||||
//
|
||||
// 18.1.0 Build 625 09/12/2018 SJ Standard Edition
|
||||
// ************************************************************
|
||||
|
||||
//Copyright (C) 2018 Intel Corporation. All rights reserved.
|
||||
//Your use of Intel Corporation's design tools, logic functions
|
||||
//and other software and tools, and its AMPP partner logic
|
||||
//functions, and any output files from any of the foregoing
|
||||
//(including device programming or simulation files), and any
|
||||
//associated documentation or information are expressly subject
|
||||
//to the terms and conditions of the Intel Program License
|
||||
//Subscription Agreement, the Intel Quartus Prime License Agreement,
|
||||
//the Intel FPGA IP License Agreement, or other applicable license
|
||||
//agreement, including, without limitation, that your use is for
|
||||
//the sole purpose of programming logic devices manufactured by
|
||||
//Intel and sold by Intel or its authorized distributors. Please
|
||||
//refer to the applicable agreement for further details.
|
||||
|
||||
module ram_data (
|
||||
address,
|
||||
clock,
|
||||
data,
|
||||
wren,
|
||||
q);
|
||||
|
||||
input [10:0] address;
|
||||
input clock;
|
||||
input [15:0] data;
|
||||
input wren;
|
||||
output [15:0] q;
|
||||
`ifndef ALTERA_RESERVED_QIS
|
||||
// synopsys translate_off
|
||||
`endif
|
||||
tri1 clock;
|
||||
`ifndef ALTERA_RESERVED_QIS
|
||||
// synopsys translate_on
|
||||
`endif
|
||||
|
||||
endmodule
|
||||
|
||||
// ============================================================
|
||||
// CNX file retrieval info
|
||||
// ============================================================
|
||||
// Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: AclrAddr NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: AclrByte NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: AclrData NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: AclrOutput NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8"
|
||||
// Retrieval info: PRIVATE: BlankMemory NUMERIC "1"
|
||||
// Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: Clken NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: DataBusSeparated NUMERIC "1"
|
||||
// Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_A"
|
||||
// Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
|
||||
// Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: JTAG_ID STRING "NONE"
|
||||
// Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: MIFfilename STRING ""
|
||||
// Retrieval info: PRIVATE: NUMWORDS_A NUMERIC "2048"
|
||||
// Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC "3"
|
||||
// Retrieval info: PRIVATE: RegAddr NUMERIC "1"
|
||||
// Retrieval info: PRIVATE: RegData NUMERIC "1"
|
||||
// Retrieval info: PRIVATE: RegOutput NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
|
||||
// Retrieval info: PRIVATE: SingleClock NUMERIC "1"
|
||||
// Retrieval info: PRIVATE: UseDQRAM NUMERIC "1"
|
||||
// Retrieval info: PRIVATE: WRCONTROL_ACLR_A NUMERIC "0"
|
||||
// Retrieval info: PRIVATE: WidthAddr NUMERIC "11"
|
||||
// Retrieval info: PRIVATE: WidthData NUMERIC "16"
|
||||
// Retrieval info: PRIVATE: rden NUMERIC "0"
|
||||
// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
|
||||
// Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS"
|
||||
// Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_A STRING "BYPASS"
|
||||
// Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
|
||||
// Retrieval info: CONSTANT: LPM_HINT STRING "ENABLE_RUNTIME_MOD=NO"
|
||||
// Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram"
|
||||
// Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "2048"
|
||||
// Retrieval info: CONSTANT: OPERATION_MODE STRING "SINGLE_PORT"
|
||||
// Retrieval info: CONSTANT: OUTDATA_ACLR_A STRING "NONE"
|
||||
// Retrieval info: CONSTANT: OUTDATA_REG_A STRING "UNREGISTERED"
|
||||
// Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING "FALSE"
|
||||
// Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_PORT_A STRING "NEW_DATA_NO_NBE_READ"
|
||||
// Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "11"
|
||||
// Retrieval info: CONSTANT: WIDTH_A NUMERIC "16"
|
||||
// Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1"
|
||||
// Retrieval info: USED_PORT: address 0 0 11 0 INPUT NODEFVAL "address[10..0]"
|
||||
// Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC "clock"
|
||||
// Retrieval info: USED_PORT: data 0 0 16 0 INPUT NODEFVAL "data[15..0]"
|
||||
// Retrieval info: USED_PORT: q 0 0 16 0 OUTPUT NODEFVAL "q[15..0]"
|
||||
// Retrieval info: USED_PORT: wren 0 0 0 0 INPUT NODEFVAL "wren"
|
||||
// Retrieval info: CONNECT: @address_a 0 0 11 0 address 0 0 11 0
|
||||
// Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0
|
||||
// Retrieval info: CONNECT: @data_a 0 0 16 0 data 0 0 16 0
|
||||
// Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0
|
||||
// Retrieval info: CONNECT: q 0 0 16 0 @q_a 0 0 16 0
|
||||
// Retrieval info: GEN_FILE: TYPE_NORMAL ram_data.v TRUE
|
||||
// Retrieval info: GEN_FILE: TYPE_NORMAL ram_data.inc FALSE
|
||||
// Retrieval info: GEN_FILE: TYPE_NORMAL ram_data.cmp FALSE
|
||||
// Retrieval info: GEN_FILE: TYPE_NORMAL ram_data.bsf TRUE
|
||||
// Retrieval info: GEN_FILE: TYPE_NORMAL ram_data_inst.v FALSE
|
||||
// Retrieval info: GEN_FILE: TYPE_NORMAL ram_data_bb.v TRUE
|
||||
// Retrieval info: LIB_FILE: altera_mf
|
369
reg_file.bdf
369
reg_file.bdf
|
@ -69,7 +69,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 472 328 488)
|
||||
(rect 160 424 328 440)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R1_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -85,7 +85,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 624 328 640)
|
||||
(rect 160 576 328 592)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R2_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -101,7 +101,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 776 328 792)
|
||||
(rect 160 728 328 744)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R3_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -117,7 +117,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 928 328 944)
|
||||
(rect 160 880 328 896)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R4_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -133,7 +133,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 1080 328 1096)
|
||||
(rect 160 1032 328 1048)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R5_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -149,7 +149,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 1232 328 1248)
|
||||
(rect 160 1184 328 1200)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R6_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -165,7 +165,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 1384 328 1400)
|
||||
(rect 160 1336 328 1352)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R7_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -197,7 +197,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 440 328 456)
|
||||
(rect 144 408 312 424)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R1_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -213,7 +213,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 592 328 608)
|
||||
(rect 144 560 312 576)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R2_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -229,7 +229,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 744 328 760)
|
||||
(rect 144 712 312 728)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R3_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -245,7 +245,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 896 328 912)
|
||||
(rect 144 864 312 880)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R4_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -261,7 +261,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 1048 328 1064)
|
||||
(rect 144 1016 312 1032)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R5_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -277,7 +277,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 1200 328 1216)
|
||||
(rect 144 1168 312 1184)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R6_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -293,7 +293,7 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 1352 328 1368)
|
||||
(rect 144 1320 312 1336)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R7_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
|
@ -586,118 +586,6 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(annotation_block (parameter)(rect 488 168 504 184))
|
||||
)
|
||||
(symbol
|
||||
(rect 328 832 504 976)
|
||||
(text "LPM_FF" (rect 19 0 78 16)(font "Arial" (font_size 10)))
|
||||
(text "R4" (rect 3 133 15 150)(font "Intel Clear" ))
|
||||
(port
|
||||
(pt 88 144)
|
||||
(input)
|
||||
(text "aclr" (rect 80 113 101 127)(font "Arial" (font_size 8)))
|
||||
(text "aclr" (rect 80 113 101 127)(font "Arial" (font_size 8)))
|
||||
(line (pt 88 144)(pt 88 128))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 24)
|
||||
(input)
|
||||
(text "aload" (rect 20 17 50 31)(font "Arial" (font_size 8)))
|
||||
(text "aload" (rect 20 17 50 31)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 24)(pt 16 24))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 88 0)
|
||||
(input)
|
||||
(text "aset" (rect 79 17 103 31)(font "Arial" (font_size 8)))
|
||||
(text "aset" (rect 79 17 103 31)(font "Arial" (font_size 8)))
|
||||
(line (pt 88 16)(pt 88 0))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 88)
|
||||
(input)
|
||||
(text "clock" (rect 20 81 49 95)(font "Arial" (font_size 8))(invisible))
|
||||
(text "clock" (rect 20 81 49 95)(font "Arial" (font_size 8))(invisible))
|
||||
(line (pt 0 88)(pt 16 88))
|
||||
)
|
||||
(port
|
||||
(pt 0 72)
|
||||
(input)
|
||||
(text "data[LPM_WIDTH-1..0]" (rect 20 63 146 77)(font "Arial" (font_size 8)))
|
||||
(text "data[]" (rect 20 63 51 77)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 72)(pt 16 72)(line_width 3))
|
||||
)
|
||||
(port
|
||||
(pt 0 104)
|
||||
(input)
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
(input)
|
||||
(text "sclr" (rect 20 113 41 127)(font "Arial" (font_size 8)))
|
||||
(text "sclr" (rect 20 113 41 127)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 120)(pt 16 120))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 56)
|
||||
(input)
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
(input)
|
||||
(text "sset" (rect 20 33 44 47)(font "Arial" (font_size 8)))
|
||||
(text "sset" (rect 20 33 44 47)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 40)(pt 16 40))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 176 88)
|
||||
(output)
|
||||
(text "q[LPM_WIDTH-1..0]" (rect 144 81 252 95)(font "Arial" (font_size 8)))
|
||||
(text "q[]" (rect 144 81 158 95)(font "Arial" (font_size 8)))
|
||||
(line (pt 160 88)(pt 176 88)(line_width 3))
|
||||
)
|
||||
(parameter
|
||||
"LPM_AVALUE"
|
||||
""
|
||||
"Unsigned value associated with the aset port"
|
||||
)
|
||||
(parameter
|
||||
"LPM_FFTYPE"
|
||||
"\"DFF\""
|
||||
"Selects behavior as DFF or TFF"
|
||||
"\"DFF\"" "\"TFF\""
|
||||
)
|
||||
(parameter
|
||||
"LPM_SVALUE"
|
||||
""
|
||||
"Unsigned value associated with the sset port"
|
||||
)
|
||||
(parameter
|
||||
"LPM_WIDTH"
|
||||
"16"
|
||||
"Width of I/O, any integer > 0"
|
||||
" 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10" "11" "12" "13" "14" "15" "16" "20" "24" "28" "32" "40" "48" "56" "64"
|
||||
(type "PARAMETER_UNSIGNED_DEC") )
|
||||
(drawing
|
||||
(line (pt 16 16)(pt 160 16))
|
||||
(line (pt 16 128)(pt 160 128))
|
||||
(line (pt 160 128)(pt 160 16))
|
||||
(line (pt 16 128)(pt 16 16))
|
||||
(line (pt 16 80)(pt 24 88))
|
||||
(line (pt 24 88)(pt 16 96))
|
||||
)
|
||||
(annotation_block (parameter)(rect 504 832 520 848))
|
||||
)
|
||||
(symbol
|
||||
(rect 328 376 504 520)
|
||||
(text "LPM_FF" (rect 19 0 78 16)(font "Arial" (font_size 10)))
|
||||
|
@ -746,6 +634,7 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
@ -761,7 +650,6 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
@ -858,6 +746,7 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
@ -873,7 +762,6 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
@ -970,6 +858,7 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
@ -985,7 +874,6 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
@ -1034,6 +922,118 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(annotation_block (parameter)(rect 504 680 520 696))
|
||||
)
|
||||
(symbol
|
||||
(rect 328 832 504 976)
|
||||
(text "LPM_FF" (rect 19 0 78 16)(font "Arial" (font_size 10)))
|
||||
(text "R4" (rect 3 133 15 150)(font "Intel Clear" ))
|
||||
(port
|
||||
(pt 88 144)
|
||||
(input)
|
||||
(text "aclr" (rect 80 113 101 127)(font "Arial" (font_size 8)))
|
||||
(text "aclr" (rect 80 113 101 127)(font "Arial" (font_size 8)))
|
||||
(line (pt 88 144)(pt 88 128))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 24)
|
||||
(input)
|
||||
(text "aload" (rect 20 17 50 31)(font "Arial" (font_size 8)))
|
||||
(text "aload" (rect 20 17 50 31)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 24)(pt 16 24))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 88 0)
|
||||
(input)
|
||||
(text "aset" (rect 79 17 103 31)(font "Arial" (font_size 8)))
|
||||
(text "aset" (rect 79 17 103 31)(font "Arial" (font_size 8)))
|
||||
(line (pt 88 16)(pt 88 0))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 88)
|
||||
(input)
|
||||
(text "clock" (rect 20 81 49 95)(font "Arial" (font_size 8))(invisible))
|
||||
(text "clock" (rect 20 81 49 95)(font "Arial" (font_size 8))(invisible))
|
||||
(line (pt 0 88)(pt 16 88))
|
||||
)
|
||||
(port
|
||||
(pt 0 72)
|
||||
(input)
|
||||
(text "data[LPM_WIDTH-1..0]" (rect 20 63 146 77)(font "Arial" (font_size 8)))
|
||||
(text "data[]" (rect 20 63 51 77)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 72)(pt 16 72)(line_width 3))
|
||||
)
|
||||
(port
|
||||
(pt 0 104)
|
||||
(input)
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
(input)
|
||||
(text "sclr" (rect 20 113 41 127)(font "Arial" (font_size 8)))
|
||||
(text "sclr" (rect 20 113 41 127)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 120)(pt 16 120))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 56)
|
||||
(input)
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
(input)
|
||||
(text "sset" (rect 20 33 44 47)(font "Arial" (font_size 8)))
|
||||
(text "sset" (rect 20 33 44 47)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 40)(pt 16 40))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 176 88)
|
||||
(output)
|
||||
(text "q[LPM_WIDTH-1..0]" (rect 144 81 252 95)(font "Arial" (font_size 8)))
|
||||
(text "q[]" (rect 144 81 158 95)(font "Arial" (font_size 8)))
|
||||
(line (pt 160 88)(pt 176 88)(line_width 3))
|
||||
)
|
||||
(parameter
|
||||
"LPM_AVALUE"
|
||||
""
|
||||
"Unsigned value associated with the aset port"
|
||||
)
|
||||
(parameter
|
||||
"LPM_FFTYPE"
|
||||
"\"DFF\""
|
||||
"Selects behavior as DFF or TFF"
|
||||
"\"DFF\"" "\"TFF\""
|
||||
)
|
||||
(parameter
|
||||
"LPM_SVALUE"
|
||||
""
|
||||
"Unsigned value associated with the sset port"
|
||||
)
|
||||
(parameter
|
||||
"LPM_WIDTH"
|
||||
"16"
|
||||
"Width of I/O, any integer > 0"
|
||||
" 1" " 2" " 3" " 4" " 5" " 6" " 7" " 8" " 9" "10" "11" "12" "13" "14" "15" "16" "20" "24" "28" "32" "40" "48" "56" "64"
|
||||
(type "PARAMETER_UNSIGNED_DEC") )
|
||||
(drawing
|
||||
(line (pt 16 16)(pt 160 16))
|
||||
(line (pt 16 128)(pt 160 128))
|
||||
(line (pt 160 128)(pt 160 16))
|
||||
(line (pt 16 128)(pt 16 16))
|
||||
(line (pt 16 80)(pt 24 88))
|
||||
(line (pt 24 88)(pt 16 96))
|
||||
)
|
||||
(annotation_block (parameter)(rect 504 832 520 848))
|
||||
)
|
||||
(symbol
|
||||
(rect 328 984 504 1128)
|
||||
(text "LPM_FF" (rect 19 0 78 16)(font "Arial" (font_size 10)))
|
||||
|
@ -1082,6 +1082,7 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
@ -1097,7 +1098,6 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
@ -1194,6 +1194,7 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
@ -1209,7 +1210,6 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
@ -1306,6 +1306,7 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
@ -1321,7 +1322,6 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
@ -1556,6 +1556,111 @@ refer to the applicable agreement for further details.
|
|||
(pt 672 432)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 600)
|
||||
(pt 320 600)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 448)
|
||||
(pt 320 416)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 448)
|
||||
(pt 320 448)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 416)
|
||||
(pt 312 416)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 600)
|
||||
(pt 320 568)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 568)
|
||||
(pt 312 568)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 752)
|
||||
(pt 320 720)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 752)
|
||||
(pt 320 752)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 720)
|
||||
(pt 312 720)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 904)
|
||||
(pt 320 872)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 904)
|
||||
(pt 320 904)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 872)
|
||||
(pt 312 872)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 1056)
|
||||
(pt 320 1024)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 1056)
|
||||
(pt 320 1056)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 1024)
|
||||
(pt 312 1024)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 1208)
|
||||
(pt 320 1176)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 1208)
|
||||
(pt 320 1208)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 1176)
|
||||
(pt 312 1176)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 1360)
|
||||
(pt 320 1328)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 1360)
|
||||
(pt 320 1360)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 1328)
|
||||
(pt 312 1328)
|
||||
(bus)
|
||||
)
|
||||
(junction (pt 128 1224))
|
||||
(junction (pt 128 1072))
|
||||
(junction (pt 128 920))
|
||||
|
|
Loading…
Reference in a new issue