Aadi Desai supleed2
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  • London, UK
  • https://8bit.lol

  • Trying this thing out, sorta as a second home, and sorta as a GitHub mirror

  • Joined on 2024-04-15
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ELEC60013-ES-CW2
C++ 0 0
Coursework 2 for ELEC60013: Embedded Systems at Imperial College London - a music synthesizer with keys to cover one octave and the ability to daisy chain multiple devices to expand to cover more octaves
cpp platformio embedded-systems firmware realtime
Updated 2023-06-28 09:25:30 +00:00
cordic
SystemVerilog 0 0
SystemVerilog CORDIC block that converts from an input phase (sawtooth wave) to a sine wave
systemverilog cordic module sine-wave waveform-generator
Updated 2023-06-04 13:26:05 +00:00
svd2cpp
C++ 0 0
Fork of czyzlukasz/svd2cpp with minor fixes for compilation, not maintained.
Updated 2023-03-06 16:52:51 +00:00
COMP70017-PoDL-CW
HTML 0 0
Coursework for COMP70017 Principles of Distributed Ledgers
distributed-computing distributed-ledger solidity
Updated 2023-02-21 16:00:42 +00:00
COMP70017-PoDL-T2
Text 0 0
Implementation of ERC20 and ERC721 as part of the Principles of Distributed Ledgers course
distributed-computing distributed-ledger solidity
Updated 2023-02-07 12:05:15 +00:00
ELEC70056-HSV-CW2
SystemVerilog 0 0
About Coursework 2 for ELEC70056: Hardware and Software Verification, Hardware Component - Verification of SystemVerilog designs using assertions and timing statements
systemverilog hardware-verification
Updated 2022-12-16 22:16:17 +00:00
ELEC70056-HSV-CW1
Isabelle 0 0
About Coursework 1 for ELEC70056: Hardware and Software Verification, Software Component - Verification of code using Dafny and the theorem-prover Isabelle
dafny isabelle software-verification
Updated 2022-12-16 14:01:53 +00:00
ELEC60011-DSD-CW
Verilog 0 0
Coursework for ELEC60011: Digital System Design - a Quartus project containing a NIOS II soft-core and custom instruction hardware accelerators for the target function
systemverilog fpga quartus-prime nios-ii
Updated 2022-09-16 11:11:39 +00:00
apbDriver
SystemVerilog 0 0
Basic APB-compatible module designed for use with Verilator, but should work with any DPI-C compatible simulator.
systemverilog apb dpi-c verilator
Updated 2022-09-15 17:28:16 +00:00
axiTest
SystemVerilog 0 0
AXI4-Lite compatible Driver module for use with Verilator and other DPI-C compatible simulators.
systemverilog verilator axi4-lite work-in-progress
Updated 2022-09-15 17:26:54 +00:00
ELEC40006-P1-CW
Verilog 0 0
Yr1 Summer Term Project, ARM-based CPU designed to be simulated in Icarus Verilog
verilog arm iverilog
Updated 2022-07-12 10:39:02 +00:00
ELEC50003-P1-CW
C 0 0
Yr2 Summer Term Rover Project, files for the various modules that make up an autonomous rover, designed to be similar to the 3D printer Pronterface UI
verilog autonomous-robots cpp platformio
Updated 2022-06-27 16:13:47 +00:00
gondilinabot-python
Python 0 0
Deprecated - Dad bot that replies when Dad is offline
deprecated discord-bot discord-py python
Updated 2022-06-14 18:21:55 +00:00
ELEC60013-ES-CW1
Dart 0 0
Coursework 1 for ELEC60013: Embedded Systems at Imperial College London - a pet-tracking IoT without the need for an embedded GPS, codename: Barkr
findmy iot mqtt raspberry-pi
Updated 2022-06-13 11:57:41 +00:00
sv-filelist-parser
Rust 0 0
Rust library to parse SystemVerilog / Verilog filelists, used in https://github.com/dalance/svlint
rust filelist parser systemverilog
Updated 2022-05-16 21:52:20 +00:00