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svd2cpp

Zero-cost abstraction register library generator.

What is svd2cpp?

svd2cpp is a generator that parses .svd files provided by ARM chip vendor. It generates header file that allows for reading and writing to microcontroller's registers with zero overhead.

Benefits

  • Compile-time checking. This is an aspect that is making this solution better than any other parser/pre-generated header.
    • You won't be able to write to wrong register.
    • You won't be able to write wrong value (i.e. 0b1011 to 3-bit field) to register.
    • You can't read from write-only or write to read-only register. Any attempt to do something wrong will succeed in error at compile-time - no more runtime debugging to find out misspelling errors!
  • Zero-cost abstraction. Another strong aspect of headers generated by svd2cpp is that using it in code will result in zero overhead because all of the checking is done at compile-time.
  • Portability. As long as manufacturer provides .svd files in CMSIS-SVD format (and most major manufacturers of Cortex-M based chips does), you can use it with this parser.

How to get svd2cpp?

Clone the repository, get submodules, compile.

~$ git clone https://github.com/supleed2/svd2cpp.git
~$ cd svd2cpp
~/svd2cpp$ git submodule init && git submodule update
~/svd2cpp$ mkdir build && cd build
~/svd2cpp/build$ cmake ..
~/svd2cpp/build$ make

How to use svd2cpp?

./svd2cpp -i svdFile.svd -o generatedHeader.hpp

How to use generated header?

After including header in your code, you can use all features such as set, reset, read.

Syntax is quite simple and easy to use:

operation<PERIPHERAL::REGISTER::FIELD>();

Examples:

In peripheral USART1: Set bit UE(USART enable) in CR1(Control Register 1):

set<USART1::CR1::UE>();

In peripheral USART1: Reset bit UE(USART enable) in CR1(Control Register 1):

reset<USART1::CR1::UE>();

In peripheral DMA1: Read TCIF1(Channel 1 Transfer Complete flag) in ISR:

bool transferComplete = read<DMA1::ISR::TCIF1>();

In peripheral DMA1: Set MA(Memory address) for CMAR2(DMA channel 2 memory address register):

set<DMA1::CMAR2::MA>(0xDEADBEEF);