Filter

Clear filters

Archived Not archived

Forks Not forks

Mirrors Not mirrors

Templates Not templates

Private Public

Sort

Newest Oldest Alphabetically Reverse alphabetically Recently updated Least recently updated Most stars Fewest stars Most forks Fewest forks Smallest size Largest size

supleed2/ ELEC60011-DSD-CW

Verilog 0 0

Coursework for ELEC60011: Digital System Design - a Quartus project containing a NIOS II soft-core and custom instruction hardware accelerators for the target function

systemverilog fpga quartus-prime nios-ii

Updated 2022-09-16 11:11:39 +00:00

supleed2/ ELEC50010-IAC-CW

Verilog 0 0

Synthesizable 32-bit MIPS 1 CPU, uses a memory-mapped bus to access memory and peripherals.

cpu fpga mips quartus-prime verilog

Updated 2020-12-21 21:16:28 +00:00