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supleed2/ EIE4-FYP

Python 0 0

Source files and notes of my Final Year Project, as part of an MEng in Electronics and Information Engineering from Imperial College London

systemverilog cordic waveform-generator embedded-systems audio-synthesis can-bus ecp5 litex orangecrab risc-v stacksynth vexriscv

Updated 2024-01-19 21:57:58 +00:00

supleed2/ cordic

SystemVerilog 0 0

SystemVerilog CORDIC block that converts from an input phase (sawtooth wave) to a sine wave

systemverilog cordic module sine-wave waveform-generator

Updated 2023-06-04 13:26:05 +00:00

supleed2/ ELEC70056-HSV-CW2

SystemVerilog 0 0

About Coursework 2 for ELEC70056: Hardware and Software Verification, Hardware Component - Verification of SystemVerilog designs using assertions and timing statements

systemverilog hardware-verification

Updated 2022-12-16 22:16:17 +00:00

supleed2/ ELEC60011-DSD-CW

Verilog 0 0

Coursework for ELEC60011: Digital System Design - a Quartus project containing a NIOS II soft-core and custom instruction hardware accelerators for the target function

systemverilog fpga quartus-prime nios-ii

Updated 2022-09-16 11:11:39 +00:00

supleed2/ apbDriver

SystemVerilog 0 0

Basic APB-compatible module designed for use with Verilator, but should work with any DPI-C compatible simulator.

systemverilog apb dpi-c verilator

Updated 2022-09-15 17:28:16 +00:00

supleed2/ axiTest

SystemVerilog 0 0

AXI4-Lite compatible Driver module for use with Verilator and other DPI-C compatible simulators.

systemverilog verilator axi4-lite work-in-progress

Updated 2022-09-15 17:26:54 +00:00

supleed2/ sv-filelist-parser

Rust 0 0

Rust library to parse SystemVerilog / Verilog filelists, used in https://github.com/dalance/svlint

rust filelist parser systemverilog

Updated 2022-05-16 21:52:20 +00:00

supleed2/ ELEC60015-HLP-CW

F# 0 0

Coursework for ELEC60015: High Level Programming - adding functionality to the ISSIE program in F#, further work continues on upstream repository

systemverilog electron elmish fable fsharp hdl

Updated 2022-03-26 17:52:47 +00:00