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Author	SHA1	Message	Date
Aadi Desai	2fc16d20cb	Add files from final version	2022-09-16 11:48:05 +01:00
Aadi Desai	8e47dd4696	Add brief project description	2022-09-16 11:39:12 +01:00
Aadi Desai	0ad87f0c97	Optimised sumVector	2022-02-17 19:03:56 +00:00
Aadi Desai	00405c820c	Task 5 ... Update QSYS, add PLL block, update main C file to Task 5 end	2022-02-02 15:56:35 +00:00
Aadi Desai	8ed2b5bc0e	Task 1 & 2 ... Add source files and update to completed state at end of Task 2	2022-01-30 17:18:39 +00:00
Aadi Desai	94e215043a	Add specific entries to .gitignore ... For Verilog and C source files within project	2022-01-30 17:17:51 +00:00
Aadi Desai	dc28e5c175	Initial Commit ... Include Coursework PDF and basic test script for checking answer in Python	2022-01-25 16:48:03 +00:00