Commit graph

6 commits

Author SHA1 Message Date
Aadi Desai 9c9536016b Format top tb and add vga image buffer reset task 2022-12-12 16:05:01 +00:00
Alden0012 f586cd95d9 Add VGA and GPIO checker 2022-12-05 16:55:23 +00:00
Alden0012 128a2a9eaa Fix GPIO assertions and test-bench coverage and constraints 2022-11-14 15:28:45 +00:00
Alden0012 f2b3a72a54 Add initial GPIO test-bench 2022-11-14 10:24:11 +00:00
Aadi Desai c83b8a73f1 Switch all Verilog files to SystemVerilog file endings 2022-11-07 12:58:43 +00:00
Aadi Desai dcdda4d9e1 Initial Commit 2022-11-07 12:41:05 +00:00