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Format top tb and add vga image buffer reset task

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This commit is contained in:
Aadi Desai 2022-12-12 16:05:01 +00:00
parent f586cd95d9
commit 9c9536016b
1 changed files with 24 additions and 23 deletions
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47
tbench/ahblite_sys_tb.sv
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@ -1,31 +1,32 @@
`timescale 1ns/1ps
module ahblite_sys_tb(
module ahblite_sys_tb();
reg RESET, CLK;
wire [7:0] LED;
AHBLITE_SYS dut(.CLK(CLK), .RESET(RESET), .LED(LED));
// Note: you can modify this to give a 50MHz clock or whatever is appropriate
);
task resetVgaImageBuffers;
for (int i = 0; i < (2**dut.uAHBVGA.uvga_image.uimage_ram.ADDR_WIDTH)-1; i++) begin
dut.uAHBVGA.uvga_image.uimage_ram.ram[i] = '0;
end
for (int i = 0; i < (2**dut.uAHBVGA2.uvga_image.uimage_ram.ADDR_WIDTH)-1; i++) begin
dut.uAHBVGA2.uvga_image.uimage_ram.ram[i] = '0;
end
endtask
reg RESET, CLK;
wire [7:0] LED;
AHBLITE_SYS dut(.CLK(CLK), .RESET(RESET), .LED(LED));
// Note: you can modify this to give a 50MHz clock or whatever is appropriate
initial
begin
CLK=0;
forever
begin
initial begin
CLK=0;
forever begin
#5 CLK=1;
#5 CLK=0;
end
end
initial
begin
RESET=0;
#30 RESET=1;
#20 RESET=0;
end
end
end
initial begin
resetVgaImageBuffers();
RESET=0;
#30 RESET=1;
#20 RESET=0;
end
endmodule