supleed2/ELEC50010-IAC-CW
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Author SHA1 Message Date
jl7719 cfebb403ba Delete from source files and the testbench 2020-12-17 15:02:59 +00:00
jl7719 2d9cca262d Fix display appearing at the end of log file 2020-12-17 14:51:08 +00:00
Aadi Desai e89087c127 Bus Memory typo in bus script 2020-12-17 06:34:42 -08:00
theexecutor13 6c400f3567 uploading log.txt weirdness testcase 2020-12-17 14:31:33 +00:00
Aadi Desai 2eccc5148e Move bus memory from rtl to testbench folder 2020-12-17 13:58:07 +00:00
Aadi Desai af29f22651 Merge branch 'main' into bus_wrapper 
Changes to be duplicated for bus version
 2020-12-17 13:54:26 +00:00
theexecutor13 0bdbb63f49
Update reference.txt 2020-12-17 21:37:17 +08:00
theexecutor13 7fcc2486cb cleanup 2020-12-17 13:37:00 +00:00
theexecutor13 ab13c84ef5 testing branch delay slot 2020-12-17 12:03:30 +00:00
theexecutor13 4ab4809a8a restructuring 2020-12-17 11:47:13 +00:00
theexecutor13 15dfce09c9
Update reference.txt 2020-12-17 19:44:23 +08:00
jl7719 6e626c5931 Change location of the memory module from rtl to testbench 2020-12-17 10:32:52 +00:00
Aadi Desai 33bb4c7538 Constant selects not working in always_ff in current iverilog 2020-12-16 14:21:26 -08:00
Aadi Desai 5e62dd82d8 Add bus vcd to gitignore, fix missing case in bus 2020-12-16 14:08:28 -08:00
Aadi Desai d17060b0a1 Add missing end to if statement 2020-12-16 13:54:01 -08:00
Aadi Desai da0c9aba01 Fix {} for bit duplication, remove module name from endmodule 2020-12-16 13:38:09 -08:00
Aadi Desai 744aee097f Modify bus tb to compile bus version instead 2020-12-16 20:15:08 +00:00
Aadi Desai 4534ca6760 Add custom test script for bus tb 
Bus specific testcases have been uncommented (sb, sh)
 2020-12-16 20:09:08 +00:00
Aadi Desai 2f9b08a363 Updated bus tb to match harvard tb 2020-12-16 20:05:00 +00:00
Aadi Desai a31ed073e1 Merge branch 'main' into bus_wrapper 2020-12-16 19:57:28 +00:00
Aadi Desai 20880f6ab2 Complete avalon bus memory 
Read and write logic (including partial writes using byte enables) complete. Address is always word aligned, as handled within bus wrapper.
 2020-12-16 19:20:48 +00:00
jl7719 697b6e0a9e Update some testcases for branch delay slots 2020-12-16 17:13:39 +00:00
jl7719 ec275418b7 Update harvard testbench regarding resets 2020-12-16 16:59:28 +00:00
jl7719 1f7027f771 Update harvard test script to match spec 
main branch ignore bus implementation
 2020-12-16 16:46:27 +00:00
Aadi Desai f5fea77ea7 General structure of bus memory 
Read and Write logic to be added
 2020-12-16 08:42:26 -08:00
jl7719 4be3149300 Update test_mips_cpu_bus.sh 
Needs checking for source file for bus version
 2020-12-16 15:58:03 +00:00
Aadi Desai d8c918c9b4 Merge branch 'main' into bus_wrapper 2020-12-16 15:41:56 +00:00
Aadi Desai 252f630162 Cleanup 2020-12-16 15:40:21 +00:00
Aadi Desai 1a413d9686 Merge branch 'main' into jl7719 2020-12-16 15:40:07 +00:00
jl7719 ebe33ce56a Passes all tests 2020-12-16 15:29:04 +00:00
Jeevaha Coelho 7185f7e7e6 Fixed BGEZAL 2020-12-16 07:00:46 -08:00
Aadi Desai 67682ecfde Create basic bus memory block 
I/O, parameters and initial setup block included
 2020-12-16 14:07:43 +00:00
Jeevaha Coelho 2673e23137 FIxed PC! 2020-12-16 05:21:57 -08:00
jl7719 ad68ab0974 Debugging and debugging 
PC, Jump instr, branches
 2020-12-16 12:29:22 +00:00
jl7719 0891f7e653 Debug mult/div to work 
it works now
 2020-12-16 08:38:46 +00:00
jl7719 4ff160db1a Fix syntax errors from mult/div 2020-12-16 05:04:45 +00:00
yhp19 07d32e9baf fixed input file plz document ur change in reference.txt 2020-12-16 12:27:48 +08:00
Jeevaha Coelho 864c8b6964 Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into jl7719 2020-12-15 13:48:50 -08:00
Jeevaha Coelho 90917f7566 Updated PC, Harv, ALU, to work w/ MULT(U), DIV(U) 2020-12-15 13:48:28 -08:00
yhp19 b54092cd57 reference txt 2020-12-16 01:00:03 +08:00
yhp19 cc5d2bbeab changes to input files 2020-12-16 00:57:46 +08:00
theexecutor13 6e600966db
Update reference.txt 2020-12-16 00:06:33 +08:00
jl7719 85efff275a Fix program counter taking two cycles for each instr 2020-12-15 15:53:30 +00:00
jl7719 01a3b9a973 Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into jl7719 
merge
 2020-12-15 15:20:43 +00:00
jl7719 fc5c8a17f5 Fix signed error in alu block 2020-12-15 15:19:51 +00:00
theexecutor13 44b6b7200f
Update reference.txt 2020-12-15 23:18:18 +08:00
jl7719 2e17e38957 Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into jl7719 
merge
 2020-12-15 15:07:22 +00:00
jl7719 b812399844 Fix to allow multiple testcases for each instruction 2020-12-15 15:06:04 +00:00
theexecutor13 c88ad413cf
Update reference.txt 2020-12-15 22:05:57 +08:00
Ibrahim adb4b5d6fd created seperate division testcases, fived srlv, sllu, srav & added sh (forgot this instruction previously) 2020-12-15 13:42:09 +00:00