Aadi Desai
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af29f22651
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Merge branch 'main' into bus_wrapper
Changes to be duplicated for bus version
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2020-12-17 13:54:26 +00:00 |
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theexecutor13
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0bdbb63f49
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Update reference.txt
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2020-12-17 21:37:17 +08:00 |
|
theexecutor13
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7fcc2486cb
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cleanup
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2020-12-17 13:37:00 +00:00 |
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theexecutor13
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ab13c84ef5
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testing branch delay slot
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2020-12-17 12:03:30 +00:00 |
|
theexecutor13
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4ab4809a8a
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restructuring
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2020-12-17 11:47:13 +00:00 |
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theexecutor13
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15dfce09c9
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Update reference.txt
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2020-12-17 19:44:23 +08:00 |
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jl7719
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6e626c5931
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Change location of the memory module from rtl to testbench
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2020-12-17 10:32:52 +00:00 |
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Aadi Desai
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33bb4c7538
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Constant selects not working in always_ff in current iverilog
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2020-12-16 14:21:26 -08:00 |
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Aadi Desai
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5e62dd82d8
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Add bus vcd to gitignore, fix missing case in bus
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2020-12-16 14:08:28 -08:00 |
|
Aadi Desai
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d17060b0a1
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Add missing end to if statement
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2020-12-16 13:54:01 -08:00 |
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Aadi Desai
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da0c9aba01
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Fix {} for bit duplication, remove module name from endmodule
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2020-12-16 13:38:09 -08:00 |
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Aadi Desai
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744aee097f
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Modify bus tb to compile bus version instead
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2020-12-16 20:15:08 +00:00 |
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Aadi Desai
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4534ca6760
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Add custom test script for bus tb
Bus specific testcases have been uncommented (sb, sh)
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2020-12-16 20:09:08 +00:00 |
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Aadi Desai
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2f9b08a363
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Updated bus tb to match harvard tb
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2020-12-16 20:05:00 +00:00 |
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Aadi Desai
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a31ed073e1
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Merge branch 'main' into bus_wrapper
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2020-12-16 19:57:28 +00:00 |
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Aadi Desai
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20880f6ab2
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Complete avalon bus memory
Read and write logic (including partial writes using byte enables) complete. Address is always word aligned, as handled within bus wrapper.
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2020-12-16 19:20:48 +00:00 |
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jl7719
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697b6e0a9e
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Update some testcases for branch delay slots
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2020-12-16 17:13:39 +00:00 |
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jl7719
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ec275418b7
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Update harvard testbench regarding resets
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2020-12-16 16:59:28 +00:00 |
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jl7719
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1f7027f771
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Update harvard test script to match spec
main branch ignore bus implementation
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2020-12-16 16:46:27 +00:00 |
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Aadi Desai
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f5fea77ea7
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General structure of bus memory
Read and Write logic to be added
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2020-12-16 08:42:26 -08:00 |
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jl7719
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4be3149300
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Update test_mips_cpu_bus.sh
Needs checking for source file for bus version
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2020-12-16 15:58:03 +00:00 |
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Aadi Desai
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d8c918c9b4
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Merge branch 'main' into bus_wrapper
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2020-12-16 15:41:56 +00:00 |
|
Aadi Desai
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252f630162
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Cleanup
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2020-12-16 15:40:21 +00:00 |
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Aadi Desai
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1a413d9686
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Merge branch 'main' into jl7719
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2020-12-16 15:40:07 +00:00 |
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jl7719
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ebe33ce56a
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Passes all tests
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2020-12-16 15:29:04 +00:00 |
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Jeevaha Coelho
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7185f7e7e6
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Fixed BGEZAL
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2020-12-16 07:00:46 -08:00 |
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Aadi Desai
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67682ecfde
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Create basic bus memory block
I/O, parameters and initial setup block included
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2020-12-16 14:07:43 +00:00 |
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Jeevaha Coelho
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2673e23137
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FIxed PC!
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2020-12-16 05:21:57 -08:00 |
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jl7719
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ad68ab0974
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Debugging and debugging
PC, Jump instr, branches
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2020-12-16 12:29:22 +00:00 |
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jl7719
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0891f7e653
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Debug mult/div to work
it works now
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2020-12-16 08:38:46 +00:00 |
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jl7719
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4ff160db1a
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Fix syntax errors from mult/div
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2020-12-16 05:04:45 +00:00 |
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yhp19
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07d32e9baf
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fixed input file plz document ur change in reference.txt
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2020-12-16 12:27:48 +08:00 |
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Jeevaha Coelho
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864c8b6964
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Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into jl7719
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2020-12-15 13:48:50 -08:00 |
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Jeevaha Coelho
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90917f7566
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Updated PC, Harv, ALU, to work w/ MULT(U), DIV(U)
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2020-12-15 13:48:28 -08:00 |
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yhp19
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b54092cd57
|
reference txt
|
2020-12-16 01:00:03 +08:00 |
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yhp19
|
cc5d2bbeab
|
changes to input files
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2020-12-16 00:57:46 +08:00 |
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theexecutor13
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6e600966db
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Update reference.txt
|
2020-12-16 00:06:33 +08:00 |
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jl7719
|
85efff275a
|
Fix program counter taking two cycles for each instr
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2020-12-15 15:53:30 +00:00 |
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jl7719
|
01a3b9a973
|
Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into jl7719
merge
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2020-12-15 15:20:43 +00:00 |
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jl7719
|
fc5c8a17f5
|
Fix signed error in alu block
|
2020-12-15 15:19:51 +00:00 |
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theexecutor13
|
44b6b7200f
|
Update reference.txt
|
2020-12-15 23:18:18 +08:00 |
|
jl7719
|
2e17e38957
|
Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into jl7719
merge
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2020-12-15 15:07:22 +00:00 |
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jl7719
|
b812399844
|
Fix to allow multiple testcases for each instruction
|
2020-12-15 15:06:04 +00:00 |
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theexecutor13
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c88ad413cf
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Update reference.txt
|
2020-12-15 22:05:57 +08:00 |
|
Ibrahim
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adb4b5d6fd
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created seperate division testcases, fived srlv, sllu, srav & added sh (forgot this instruction previously)
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2020-12-15 13:42:09 +00:00 |
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Ibrahim
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26ccff5057
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Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into main
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2020-12-15 13:38:04 +00:00 |
|
Jeevaha Coelho
|
85ba783a69
|
Fixed signing error in alu and added excel file
|
2020-12-15 05:21:37 -08:00 |
|
Jeevaha Coelho
|
5df8a72ca1
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fixed naming convention errors in pc and harvard
|
2020-12-15 03:16:01 -08:00 |
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ppuk
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2030a186cc
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changed bltzal input txt
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2020-12-15 08:56:23 +00:00 |
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jl7719
|
63abcf671a
|
Tidy up and change bash to ./
|
2020-12-14 17:49:30 +00:00 |
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