supleed2/ELEC60011-DSD-CW
1
0
Fork 0
mirror of https://github.com/supleed2/ELEC60011-DSD-CW.git synced 2024-12-22 21:55:48 +00:00
Code Issues Packages Projects Releases Wiki Activity

Add specific entries to .gitignore

Browse source 
For Verilog and C source files within project
This commit is contained in:
Aadi Desai 2022-01-30 17:17:51 +00:00
parent dc28e5c175
commit 94e215043a
No known key found for this signature in database
GPG key ID: CFFFE425830EF4D9
1 changed files with 5 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
.gitignore vendored
View file

@ -1,6 +1,11 @@
**
!system_template_de1_soc/
!*.v
!*.qsys
!system_template_de1_soc/software/
!system_template_de1_soc/software/*
system_template_de1_soc/software/*_bsp
!system_template_de1_soc/software/*/*.c
!DSD_coursework_DE1-SoC.pdf
!README.md
!Python/