supleed2/EIE4-FYP
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Author SHA1 Message Date
Aadi Desai 2b18d82358
Add Sawtooth module to build 2023-03-11 18:05:56 +00:00
Aadi Desai 4be040e449
Add LiteX Sawtooth test module 2023-03-11 18:05:32 +00:00
Aadi Desai 3edc1f92d7
Add DAC Driver block 2023-03-11 18:05:03 +00:00
Aadi Desai a473a6ff9c
Add Sawtooth Generator Block 2023-03-11 18:04:53 +00:00
Aadi Desai 768d74f2e4
Add extra notes / links to readme 2023-03-10 17:48:46 +00:00
Aadi Desai 485cf24ae1
Add shell pcmFifo LiteX module (basic inst, no logic) 2023-03-10 17:48:18 +00:00
Aadi Desai 0f61a6d19a
Add pcmfifo SystemVerilog module 2023-03-10 17:47:39 +00:00
Aadi Desai c8955842d5
Add svlint linting rules 2023-03-10 17:47:18 +00:00
Aadi Desai f296ed53d4
Update demo led program for PWM driver 2023-03-07 21:00:30 +00:00
Aadi Desai 5ad6a22db5
Demo using input to set 3-bit led colour 2023-03-07 20:09:56 +00:00
Aadi Desai 29e926beba
Add demo software files and gitignore/build script 2023-03-07 19:05:21 +00:00
Aadi Desai 85bc100121
Links to read / reference for CDC for sound data 2023-03-07 18:48:46 +00:00
Aadi Desai cc0ab0f2b4
Add useful links on gdb and zephyr 2023-03-04 14:54:57 +00:00
Aadi Desai f5b923ca57
Add DAC Pin definitions to platform in make.py 2023-03-04 14:54:36 +00:00
Aadi Desai 8c0eee54b4
Remove reset value from TestRgb 2023-03-04 14:54:09 +00:00
Aadi Desai 5de7bc535a
Update make.py with GPIO pads and TestRgb module using custom clock 2023-03-03 17:07:19 +00:00
Aadi Desai 07f57f4cf8
Add LiteX Module for TestRgb inc module docs 2023-03-03 17:06:20 +00:00
Aadi Desai 52eb0bdaf7
Signal prefixes are removed by migen, so double 2023-03-03 17:05:53 +00:00
Aadi Desai 740316a47f
Add LiteX Docs link to readme 2023-03-03 17:05:22 +00:00
Aadi Desai 529efcaf9f
Add pwm module to set LED colour from LiteX Console 2023-03-03 17:05:00 +00:00
Aadi Desai d960053a7e
Update flip.sv to cycle across colours using 48MHz 2023-03-03 17:04:22 +00:00
Aadi Desai 81b2d004a5
Update build script 
Exit on error
Build documentation & move to project root
Move built bitstream to Win11 Desktop
 2023-03-03 17:03:43 +00:00
Aadi Desai b90a0efadc
Add more useful links to readme backup 2023-02-26 19:42:08 +00:00
Aadi Desai 2e83f912d1
Update make Python script to use test LiteX Module 2023-02-26 19:41:51 +00:00
Aadi Desai 3ea0c58728
Add build shortcut script 2023-02-26 19:41:10 +00:00
Aadi Desai e1b0d5c28c
Add testing SystemVerilog and LiteX Module 2023-02-26 19:40:56 +00:00
Aadi Desai 9322fe0fd4
Add readme notes 2023-02-26 14:59:50 +00:00
Aadi Desai 6d8c1059fa
Initial commit to prevent data loss 
such as in the case of sudden laptop death
 2023-02-05 00:56:34 +00:00