Aadi Desai
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cc0ab0f2b4
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Add useful links on gdb and zephyr
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2023-03-04 14:54:57 +00:00 |
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Aadi Desai
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f5b923ca57
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Add DAC Pin definitions to platform in make.py
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2023-03-04 14:54:36 +00:00 |
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Aadi Desai
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8c0eee54b4
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Remove reset value from TestRgb
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2023-03-04 14:54:09 +00:00 |
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Aadi Desai
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5de7bc535a
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Update make.py with GPIO pads and TestRgb module using custom clock
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2023-03-03 17:07:19 +00:00 |
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Aadi Desai
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07f57f4cf8
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Add LiteX Module for TestRgb inc module docs
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2023-03-03 17:06:20 +00:00 |
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Aadi Desai
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52eb0bdaf7
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Signal prefixes are removed by migen, so double
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2023-03-03 17:05:53 +00:00 |
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Aadi Desai
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740316a47f
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Add LiteX Docs link to readme
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2023-03-03 17:05:22 +00:00 |
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Aadi Desai
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529efcaf9f
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Add pwm module to set LED colour from LiteX Console
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2023-03-03 17:05:00 +00:00 |
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Aadi Desai
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d960053a7e
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Update flip.sv to cycle across colours using 48MHz
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2023-03-03 17:04:22 +00:00 |
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Aadi Desai
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81b2d004a5
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Update build script
Exit on error
Build documentation & move to project root
Move built bitstream to Win11 Desktop
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2023-03-03 17:03:43 +00:00 |
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Aadi Desai
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b90a0efadc
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Add more useful links to readme backup
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2023-02-26 19:42:08 +00:00 |
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Aadi Desai
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2e83f912d1
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Update make Python script to use test LiteX Module
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2023-02-26 19:41:51 +00:00 |
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Aadi Desai
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3ea0c58728
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Add build shortcut script
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2023-02-26 19:41:10 +00:00 |
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Aadi Desai
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e1b0d5c28c
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Add testing SystemVerilog and LiteX Module
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2023-02-26 19:40:56 +00:00 |
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Aadi Desai
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9322fe0fd4
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Add readme notes
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2023-02-26 14:59:50 +00:00 |
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Aadi Desai
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6d8c1059fa
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Initial commit to prevent data loss
such as in the case of sudden laptop death
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2023-02-05 00:56:34 +00:00 |
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