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supleed2/ ELEC70056-HSV-CW2
SystemVerilog 0 0
About Coursework 2 for ELEC70056: Hardware and Software Verification, Hardware Component - Verification of SystemVerilog designs using assertions and timing statements
systemverilog hardware-verification
Updated 2022-12-16 22:16:17 +00:00
supleed2/ ELEC70056-HSV-CW1
Isabelle 0 0
About Coursework 1 for ELEC70056: Hardware and Software Verification, Software Component - Verification of code using Dafny and the theorem-prover Isabelle
dafny isabelle software-verification
Updated 2022-12-16 14:01:53 +00:00
supleed2/ ELEC60011-DSD-CW
Verilog 0 0
Coursework for ELEC60011: Digital System Design - a Quartus project containing a NIOS II soft-core and custom instruction hardware accelerators for the target function
systemverilog fpga quartus-prime nios-ii
Updated 2022-09-16 11:11:39 +00:00
supleed2/ apbDriver
SystemVerilog 0 0
Basic APB-compatible module designed for use with Verilator, but should work with any DPI-C compatible simulator.
systemverilog apb dpi-c verilator
Updated 2022-09-15 17:28:16 +00:00
supleed2/ axiTest
SystemVerilog 0 0
AXI4-Lite compatible Driver module for use with Verilator and other DPI-C compatible simulators.
systemverilog verilator axi4-lite work-in-progress
Updated 2022-09-15 17:26:54 +00:00
supleed2/ ELEC40006-P1-CW
Verilog 0 0
Yr1 Summer Term Project, ARM-based CPU designed to be simulated in Icarus Verilog
verilog arm iverilog
Updated 2022-07-12 10:39:02 +00:00
supleed2/ ELEC50003-P1-CW
C 0 0
Yr2 Summer Term Rover Project, files for the various modules that make up an autonomous rover, designed to be similar to the 3D printer Pronterface UI
verilog autonomous-robots cpp platformio
Updated 2022-06-27 16:13:47 +00:00
supleed2/ gondilinabot-python
Python 0 0
Deprecated - Dad bot that replies when Dad is offline
deprecated discord-bot discord-py python
Updated 2022-06-14 18:21:55 +00:00
supleed2/ ELEC60013-ES-CW1
Dart 0 0
Coursework 1 for ELEC60013: Embedded Systems at Imperial College London - a pet-tracking IoT without the need for an embedded GPS, codename: Barkr
findmy iot mqtt raspberry-pi
Updated 2022-06-13 11:57:41 +00:00
supleed2/ sv-filelist-parser
Rust 0 0
Rust library to parse SystemVerilog / Verilog filelists, used in https://github.com/dalance/svlint
rust filelist parser systemverilog
Updated 2022-05-16 21:52:20 +00:00
supleed2/ ELEC60015-HLP-CW
F# 0 0
Coursework for ELEC60015: High Level Programming - adding functionality to the ISSIE program in F#, further work continues on upstream repository
systemverilog electron elmish fable fsharp hdl
Updated 2022-03-26 17:52:47 +00:00
supleed2/ ELEC50010-IAC-CW
Verilog 0 0
Synthesizable 32-bit MIPS 1 CPU, uses a memory-mapped bus to access memory and peripherals.
cpu fpga mips quartus-prime verilog
Updated 2020-12-21 21:16:28 +00:00