supleed2/ELEC50010-IAC-CW
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Author SHA1 Message Date
jl7719 01a3b9a973 Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into jl7719 
merge
 2020-12-15 15:20:43 +00:00
jl7719 fc5c8a17f5 Fix signed error in alu block 2020-12-15 15:19:51 +00:00
theexecutor13 44b6b7200f
Update reference.txt 2020-12-15 23:18:18 +08:00
jl7719 2e17e38957 Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into jl7719 
merge
 2020-12-15 15:07:22 +00:00
jl7719 b812399844 Fix to allow multiple testcases for each instruction 2020-12-15 15:06:04 +00:00
theexecutor13 c88ad413cf
Update reference.txt 2020-12-15 22:05:57 +08:00
Ibrahim adb4b5d6fd created seperate division testcases, fived srlv, sllu, srav & added sh (forgot this instruction previously) 2020-12-15 13:42:09 +00:00
Ibrahim 26ccff5057 Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into main 2020-12-15 13:38:04 +00:00
Jeevaha Coelho 85ba783a69 Fixed signing error in alu and added excel file 2020-12-15 05:21:37 -08:00
Jeevaha Coelho 5df8a72ca1 fixed naming convention errors in pc and harvard 2020-12-15 03:16:01 -08:00
ppuk 2030a186cc changed bltzal input txt 2020-12-15 08:56:23 +00:00
jl7719 63abcf671a Tidy up and change bash to ./ 2020-12-14 17:49:30 +00:00
jl7719 51dbe68ea8 Fix running on different environment issue 
Now completely shifted to Ubuntu 18.04 setup should work for everyone
 2020-12-14 17:38:39 +00:00
theexecutor13 6519be9a9e
Update reference.txt 2020-12-14 23:59:08 +08:00
theexecutor13 d72676c30c
Update bltzal.txt 2020-12-14 23:58:08 +08:00
ppuk 2d935d9211 linux supported 2020-12-14 15:38:05 +00:00
jc4419 da6be29109 Merge branch 'main' of https://github.com/supleed2/AM04_CPU into main 2020-12-13 15:38:04 +04:00
jc4419 be27fdc1ce Updated PC/Harvard, should work with delay slot 2020-12-13 15:37:44 +04:00
jl7719 f882d1e361 Test different inputs for lb, lbu 
it works
 2020-12-13 15:16:53 +09:00
jl7719 7150487472 Rename initialisation files 2020-12-13 14:54:53 +09:00
jl7719 943745a1e0 Tested all that can be tested for now 
Mult/Div, Branch/Jump Linking, J needs implementation before testing and store to be tested when switched to bus
 2020-12-13 14:40:16 +09:00
Aadi Desai 1123477690 Mask address during partial writes 2020-12-13 00:15:15 +00:00
Aadi Desai 50b9dba651 Added partial writes 
SH and SB were not accounted for in previous version, partial reads are handled within regfile
 2020-12-12 16:49:02 +00:00
jl7719 c31344c55f More testcases, testing, debugging 2020-12-13 01:25:36 +09:00
yhp19 276f7f8216 Added ref files for j and load instructions 2020-12-12 23:59:04 +08:00
yhp19 ab27fcaed3 Reference txt now in reference folders 2020-12-12 23:46:42 +08:00
yhp19 69cd711cfc Added load instruction txt and data.txt 2020-12-12 23:39:00 +08:00
jl7719 14ad7fa0ce Update program counter 
Logic for instructions with linking not implemented. Can do basic branch delay slots. More left to do with return register
 2020-12-12 15:59:14 +09:00
Aadi Desai af7645b5b0 Completed wrapper, to be tested 2020-12-11 19:45:00 +00:00
Aadi Desai 714b74ec83 Update mips_cpu_bus.v 
Added fetch/execute states. All instructions not using data memory should function
 2020-12-11 19:13:11 +00:00
Aadi Desai 7997076be7 Basic Wrapper, Logic to be added 2020-12-11 10:56:34 +00:00
jl7719 3594365a25 Create branch jl7719 
Can test for normal pc incrementing instr
 2020-12-11 19:45:13 +09:00
yhp19 2c5b3ad604 Merge branch 'main' of https://github.com/supleed2/AM04_CPU into main 2020-12-11 15:54:45 +08:00
yhp19 47e0f42f92 added load instructions 2020-12-11 15:54:23 +08:00
jl7719 7ffd8fb400 Add testcases and ref outputs for addiu, and, andi 2020-12-11 15:17:43 +09:00
Ibrahim 1bf7b5d40e All instructions except load finished - some test cases may need changing upon review 2020-12-10 19:39:04 +00:00
jl7719 04b1ed4fed Update control and memory 
Fixed some errors when testing
 2020-12-10 22:27:08 +09:00
jl7719 84adff2ed1 Update memory 
No longer need the massive memory
 2020-12-10 19:14:16 +09:00
jl7719 c93473a54d Update test_mips_cpu_harvard.sh 
Outputs Pass/Fail by comparing to INSTR.ref.txt files (need to add these per instr)
 2020-12-10 17:24:40 +09:00
yhp19 db344b3150 added div and instruction testcase and minor adjustment on bl instructions 2020-12-10 13:51:54 +08:00
Ibrahim 0be5617371 75% done - need to redo arithemtic operation to test edge cases & do certain instr by hand 2020-12-09 20:17:58 +00:00
yhp19 31ad264fac updated with .txt files 2020-12-10 00:57:31 +08:00
theexecutor13 315e5af32c
Update reference.txt 
Fixed branch instruction test case in ref.txt
 2020-12-10 00:41:19 +08:00
theexecutor13 b17158489f
Added jump type testcase in ref.txt 2020-12-10 00:10:38 +08:00
jl7719 7e6bc7c370 Update branch testcases 
Reference file is not updated
 2020-12-09 23:21:45 +09:00
jc4419 3a2fde81b2 Merge branch 'main' of https://github.com/supleed2/AM04_CPU into main 2020-12-09 16:27:20 +04:00
jc4419 4b8a56ee2f Fixed if logic for control 2020-12-09 16:24:21 +04:00
jl7719 c5aed43ab4 Update to test each instruction with a small memory 2020-12-09 16:47:58 +09:00
Aadi Desai 6becea322f Update mips_cpu_regfile.v 
Regfile should now compile, write is skipped if $0 is the destination register
 2020-12-08 13:23:08 +00:00
jc4419 9de2b59bbb Updated Harvard, ALU, PC, Control, and Regfile 2020-12-08 01:46:01 +04:00