mirror of
https://github.com/supleed2/ELEC50010-IAC-CW.git
synced 2024-12-22 21:35:48 +00:00
Fix running on different environment issue
Now completely shifted to Ubuntu 18.04 setup should work for everyone
This commit is contained in:
parent
2d935d9211
commit
51dbe68ea8
1
.gitignore
vendored
1
.gitignore
vendored
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@ -1,4 +1,5 @@
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exec/*
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!exec/executable.txt
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inputs/*.log.txt
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inputs/*.out.txt
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mips_cpu_harvard.vcd
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1
exec/executable.txt
Normal file
1
exec/executable.txt
Normal file
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A folder for executables
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@ -73,10 +73,8 @@ Alu Operations:
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Ops ALUOps; //Note confusing naming to avoid potential duplicate variable naming errors, as a result of enum implemetnation.
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assign ALUOps = ALUOp;
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always_comb begin
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assign ALUOps = ALUOp;
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case(ALUOps)
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ADD: begin
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ALURes = $signed(A) + $signed(B);
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@ -42,7 +42,7 @@ typedef enum logic[5:0]{
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SW = 6'd43
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} op_enum;
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op_enum op;
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assign op = Instr[31:26];
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typedef enum logic[5:0]{
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SLL = 6'd0,
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@ -68,7 +68,7 @@ typedef enum logic[5:0]{
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SLTU = 6'd43
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} funct_enum;
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funct_enum funct;
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assign funct = Instr[5:0];
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typedef enum logic[4:0]{
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BLTZ = 5'd0,
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@ -77,11 +77,12 @@ typedef enum logic[4:0]{
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BGEZAL = 5'd17
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} rt_enum;
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rt_enum rt;
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assign rt = Instr[20:16];
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always @(*) begin
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assign op = Instr[31:26];
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assign funct = Instr[5:0];
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assign rt = Instr[20:16];
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//CtrlRegDst logic
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if((op==ADDIU) || (op==ANDI) || (op==LB) || (op==LBU) || (op==LH) || (op==LHU) || (op==LUI) || (op==LW) || (op==LWL) || (op==LWR) || (op==ORI) || (op==SLTI) || (op==SLTIU) || (op==XORI))begin
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CtrlRegDst = 2'd0; //Write address comes from rt
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@ -1,9 +1,6 @@
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#!/bin/bash
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#**Delete command for windows before submission**
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#rm inputs/*.log.txt inputs/*.out.txt
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# Source File & Source Directory Parsing
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# 1. Source File & Source Directory Parsing
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SRC_DIR=${1?Error: no source directory given in argument}; # e.g. rtl
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SRC=$(ls ${SRC_DIR} | grep -E "harvard|memory|alu|regfile|pc|control");
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SRC_TEMP="";
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@ -12,15 +9,16 @@ do
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SRC_TEMP+=${SRC_DIR}/${src}" ";
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done
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SRC=${SRC_TEMP}
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#echo ${SRC};
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# Instruction Argument
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# 2. Instruction Argument
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INSTR=${2:-"No instruction specified: running all testcases"}; # e.g. addiu
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# Start Testing
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# 3. Start Testing
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# 3-1. Running ALL testcases when instruction not specified.
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if [[ ${INSTR} == "No instruction specified: running all testcases" ]];
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then
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# All Testcase Files
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TESTCASES=$(find ./inputs ! -name '*ref*' ! -name '*log*' ! -name '*out*' ! -name '*inputs*' ! -name '*data*' | sed 's#.*/##');
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#echo ${TESTCASES}
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for TESTCASE in ${TESTCASES}
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@ -29,17 +27,15 @@ then
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#echo ${TESTCASE};
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TESTCASE="${TESTCASE%%.*}";
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#/mnt/c/Windows/System32/cmd.exe /C \
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iverilog -Wall -g2012 \
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-s mips_cpu_harvard_tb \
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-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${TESTCASE}.txt\" \
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-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${TESTCASE}.data.txt\" \
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-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \
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${SRC} 2> /dev/null
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#/mnt/c/Windows/System32/cmd.exe /C vvp
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./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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echo "$(tail -1 ./inputs/${TESTCASE}.log.txt)" > ./inputs/${TESTCASE}.out.txt; # register v0 output to compare with reference
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if diff -w ./inputs/${TESTCASE}.out.txt ./inputs/${TESTCASE}.ref.txt &> /dev/null # compare
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./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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echo "$(tail -1 ./inputs/${TESTCASE}.log.txt)" > ./inputs/${TESTCASE}.out.txt; # register v0 output to compare with reference
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if diff -w ./inputs/${TESTCASE}.out.txt ./inputs/${TESTCASE}.ref.txt &> /dev/null # compare
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then
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echo ${TESTCASE} ${TESTCASE} "Pass";
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else
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@ -47,19 +43,19 @@ else
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fi
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done
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# 3-2 Running SINGLE testcase of specified instruction
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else
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# Run Testcase File Of Specified Instruction
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#/mnt/c/Windows/System32/cmd.exe /C \
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iverilog -Wall -g2012 \
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-s mips_cpu_harvard_tb \
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-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}.txt\" \
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-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}.data.txt\" \
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-o exec/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \
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${SRC} 2> /dev/null
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#/mnt/c/Windows/System32/cmd.exe /C vvp
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./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display)
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echo "$(tail -1 ./inputs/${INSTR}.log.txt)" > ./inputs/${INSTR}.out.txt; # register v0 output to compare with reference
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if diff -w ./inputs/${INSTR}.out.txt ./inputs/${INSTR}.ref.txt &> /dev/null # compare
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./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display)
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echo "$(tail -1 ./inputs/${INSTR}.log.txt)" > ./inputs/${INSTR}.out.txt; # register v0 output to compare with reference
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if diff -w ./inputs/${INSTR}.out.txt ./inputs/${INSTR}.ref.txt &> /dev/null # compare
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then
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echo ${INSTR} ${INSTR} "Pass";
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else
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@ -1,67 +0,0 @@
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#!/bin/bash
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#**Delete command for windows before submission**
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#rm inputs/*.log.txt inputs/*.out.txt
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# Source File & Source Directory Parsing
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SRC_DIR=${1?Error: no source directory given in argument}; # e.g. rtl
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SRC=$(ls ${SRC_DIR} | grep -E "harvard|memory|alu|regfile|pc|control");
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SRC_TEMP="";
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for src in ${SRC}
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do
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SRC_TEMP+=${SRC_DIR}/${src}" ";
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done
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SRC=${SRC_TEMP}
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#echo ${SRC};
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# Instruction Argument
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INSTR=${2:-"No instruction specified: running all testcases"}; # e.g. addiu
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# Start Testing
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if [[ ${INSTR} == "No instruction specified: running all testcases" ]];
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then
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# All Testcase Files
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TESTCASES=$(find ./inputs ! -name '*ref*' ! -name '*log*' ! -name '*out*' ! -name '*inputs*' ! -name '*data*' | sed 's#.*/##');
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#echo ${TESTCASES}
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for TESTCASE in ${TESTCASES}
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do
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# Run Each Testcase File
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#echo ${TESTCASE};
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TESTCASE="${TESTCASE%%.*}";
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/mnt/c/Windows/System32/cmd.exe /C \
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iverilog -Wall -g2012 \
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-s mips_cpu_harvard_tb \
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-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${TESTCASE}.txt\" \
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-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${TESTCASE}.data.txt\" \
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-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \
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${SRC} 2> /dev/null
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/mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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echo "$(tail -1 ./inputs/${TESTCASE}.log.txt)" > ./inputs/${TESTCASE}.out.txt; # register v0 output to compare with reference
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if diff -w ./inputs/${TESTCASE}.out.txt ./inputs/${TESTCASE}.ref.txt &> /dev/null # compare
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then
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echo ${TESTCASE} ${TESTCASE} "Pass";
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else
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printf '%s %s %s%d %s%d%s\n' "${TESTCASE}" "${TESTCASE}" "Fail Output=" "$(tail -1 ./inputs/${TESTCASE}.out.txt)" "Ref=" "$(tail -1 ./inputs/${TESTCASE}.ref.txt)" 2> /dev/null;
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fi
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done
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else
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# Run Testcase File Of Specified Instruction
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/mnt/c/Windows/System32/cmd.exe /C \
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iverilog -Wall -g2012 \
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-s mips_cpu_harvard_tb \
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-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}.txt\" \
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-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}.data.txt\" \
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-o exec/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \
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${SRC} 2> /dev/null
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/mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display)
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echo "$(tail -1 ./inputs/${INSTR}.log.txt)" > ./inputs/${INSTR}.out.txt; # register v0 output to compare with reference
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if diff -w ./inputs/${INSTR}.out.txt ./inputs/${INSTR}.ref.txt &> /dev/null # compare
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then
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echo ${INSTR} ${INSTR} "Pass";
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else
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printf '%s %s %s%d %s%d%s\n' "${INSTR}" "${INSTR}" "Fail Output=" "$(tail -1 ./inputs/${INSTR}.out.txt)" "Ref=" "$(tail -1 ./inputs/${INSTR}.ref.txt)" 2> /dev/null;
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fi
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fi
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