Fix running on different environment issue

Now completely shifted to Ubuntu 18.04 setup should work for everyone
This commit is contained in:
jl7719 2020-12-14 17:38:39 +00:00
parent 2d935d9211
commit 51dbe68ea8
6 changed files with 23 additions and 93 deletions

1
.gitignore vendored
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@ -1,4 +1,5 @@
exec/*
!exec/executable.txt
inputs/*.log.txt
inputs/*.out.txt
mips_cpu_harvard.vcd

1
exec/executable.txt Normal file
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@ -0,0 +1 @@
A folder for executables

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@ -73,10 +73,8 @@ Alu Operations:
Ops ALUOps; //Note confusing naming to avoid potential duplicate variable naming errors, as a result of enum implemetnation.
assign ALUOps = ALUOp;
always_comb begin
assign ALUOps = ALUOp;
case(ALUOps)
ADD: begin
ALURes = $signed(A) + $signed(B);

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@ -42,7 +42,7 @@ typedef enum logic[5:0]{
SW = 6'd43
} op_enum;
op_enum op;
assign op = Instr[31:26];
typedef enum logic[5:0]{
SLL = 6'd0,
@ -68,7 +68,7 @@ typedef enum logic[5:0]{
SLTU = 6'd43
} funct_enum;
funct_enum funct;
assign funct = Instr[5:0];
typedef enum logic[4:0]{
BLTZ = 5'd0,
@ -77,11 +77,12 @@ typedef enum logic[4:0]{
BGEZAL = 5'd17
} rt_enum;
rt_enum rt;
assign rt = Instr[20:16];
always @(*) begin
assign op = Instr[31:26];
assign funct = Instr[5:0];
assign rt = Instr[20:16];
//CtrlRegDst logic
if((op==ADDIU) || (op==ANDI) || (op==LB) || (op==LBU) || (op==LH) || (op==LHU) || (op==LUI) || (op==LW) || (op==LWL) || (op==LWR) || (op==ORI) || (op==SLTI) || (op==SLTIU) || (op==XORI))begin
CtrlRegDst = 2'd0; //Write address comes from rt

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@ -1,9 +1,6 @@
#!/bin/bash
#**Delete command for windows before submission**
#rm inputs/*.log.txt inputs/*.out.txt
# Source File & Source Directory Parsing
# 1. Source File & Source Directory Parsing
SRC_DIR=${1?Error: no source directory given in argument}; # e.g. rtl
SRC=$(ls ${SRC_DIR} | grep -E "harvard|memory|alu|regfile|pc|control");
SRC_TEMP="";
@ -12,15 +9,16 @@ do
SRC_TEMP+=${SRC_DIR}/${src}" ";
done
SRC=${SRC_TEMP}
#echo ${SRC};
# Instruction Argument
# 2. Instruction Argument
INSTR=${2:-"No instruction specified: running all testcases"}; # e.g. addiu
# Start Testing
# 3. Start Testing
# 3-1. Running ALL testcases when instruction not specified.
if [[ ${INSTR} == "No instruction specified: running all testcases" ]];
then
# All Testcase Files
TESTCASES=$(find ./inputs ! -name '*ref*' ! -name '*log*' ! -name '*out*' ! -name '*inputs*' ! -name '*data*' | sed 's#.*/##');
#echo ${TESTCASES}
for TESTCASE in ${TESTCASES}
@ -29,17 +27,15 @@ then
#echo ${TESTCASE};
TESTCASE="${TESTCASE%%.*}";
#/mnt/c/Windows/System32/cmd.exe /C \
iverilog -Wall -g2012 \
-s mips_cpu_harvard_tb \
-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${TESTCASE}.txt\" \
-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${TESTCASE}.data.txt\" \
-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \
${SRC} 2> /dev/null
#/mnt/c/Windows/System32/cmd.exe /C vvp
./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${TESTCASE}.log.txt; # log file for debugging (contains $display)
echo "$(tail -1 ./inputs/${TESTCASE}.log.txt)" > ./inputs/${TESTCASE}.out.txt; # register v0 output to compare with reference
if diff -w ./inputs/${TESTCASE}.out.txt ./inputs/${TESTCASE}.ref.txt &> /dev/null # compare
./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${TESTCASE}.log.txt; # log file for debugging (contains $display)
echo "$(tail -1 ./inputs/${TESTCASE}.log.txt)" > ./inputs/${TESTCASE}.out.txt; # register v0 output to compare with reference
if diff -w ./inputs/${TESTCASE}.out.txt ./inputs/${TESTCASE}.ref.txt &> /dev/null # compare
then
echo ${TESTCASE} ${TESTCASE} "Pass";
else
@ -47,19 +43,19 @@ else
fi
done
# 3-2 Running SINGLE testcase of specified instruction
else
# Run Testcase File Of Specified Instruction
#/mnt/c/Windows/System32/cmd.exe /C \
iverilog -Wall -g2012 \
-s mips_cpu_harvard_tb \
-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}.txt\" \
-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}.data.txt\" \
-o exec/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \
${SRC} 2> /dev/null
#/mnt/c/Windows/System32/cmd.exe /C vvp
./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display)
echo "$(tail -1 ./inputs/${INSTR}.log.txt)" > ./inputs/${INSTR}.out.txt; # register v0 output to compare with reference
if diff -w ./inputs/${INSTR}.out.txt ./inputs/${INSTR}.ref.txt &> /dev/null # compare
./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display)
echo "$(tail -1 ./inputs/${INSTR}.log.txt)" > ./inputs/${INSTR}.out.txt; # register v0 output to compare with reference
if diff -w ./inputs/${INSTR}.out.txt ./inputs/${INSTR}.ref.txt &> /dev/null # compare
then
echo ${INSTR} ${INSTR} "Pass";
else

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@ -1,67 +0,0 @@
#!/bin/bash
#**Delete command for windows before submission**
#rm inputs/*.log.txt inputs/*.out.txt
# Source File & Source Directory Parsing
SRC_DIR=${1?Error: no source directory given in argument}; # e.g. rtl
SRC=$(ls ${SRC_DIR} | grep -E "harvard|memory|alu|regfile|pc|control");
SRC_TEMP="";
for src in ${SRC}
do
SRC_TEMP+=${SRC_DIR}/${src}" ";
done
SRC=${SRC_TEMP}
#echo ${SRC};
# Instruction Argument
INSTR=${2:-"No instruction specified: running all testcases"}; # e.g. addiu
# Start Testing
if [[ ${INSTR} == "No instruction specified: running all testcases" ]];
then
# All Testcase Files
TESTCASES=$(find ./inputs ! -name '*ref*' ! -name '*log*' ! -name '*out*' ! -name '*inputs*' ! -name '*data*' | sed 's#.*/##');
#echo ${TESTCASES}
for TESTCASE in ${TESTCASES}
do
# Run Each Testcase File
#echo ${TESTCASE};
TESTCASE="${TESTCASE%%.*}";
/mnt/c/Windows/System32/cmd.exe /C \
iverilog -Wall -g2012 \
-s mips_cpu_harvard_tb \
-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${TESTCASE}.txt\" \
-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${TESTCASE}.data.txt\" \
-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \
${SRC} 2> /dev/null
/mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${TESTCASE}.log.txt; # log file for debugging (contains $display)
echo "$(tail -1 ./inputs/${TESTCASE}.log.txt)" > ./inputs/${TESTCASE}.out.txt; # register v0 output to compare with reference
if diff -w ./inputs/${TESTCASE}.out.txt ./inputs/${TESTCASE}.ref.txt &> /dev/null # compare
then
echo ${TESTCASE} ${TESTCASE} "Pass";
else
printf '%s %s %s%d %s%d%s\n' "${TESTCASE}" "${TESTCASE}" "Fail Output=" "$(tail -1 ./inputs/${TESTCASE}.out.txt)" "Ref=" "$(tail -1 ./inputs/${TESTCASE}.ref.txt)" 2> /dev/null;
fi
done
else
# Run Testcase File Of Specified Instruction
/mnt/c/Windows/System32/cmd.exe /C \
iverilog -Wall -g2012 \
-s mips_cpu_harvard_tb \
-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}.txt\" \
-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}.data.txt\" \
-o exec/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \
${SRC} 2> /dev/null
/mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display)
echo "$(tail -1 ./inputs/${INSTR}.log.txt)" > ./inputs/${INSTR}.out.txt; # register v0 output to compare with reference
if diff -w ./inputs/${INSTR}.out.txt ./inputs/${INSTR}.ref.txt &> /dev/null # compare
then
echo ${INSTR} ${INSTR} "Pass";
else
printf '%s %s %s%d %s%d%s\n' "${INSTR}" "${INSTR}" "Fail Output=" "$(tail -1 ./inputs/${INSTR}.out.txt)" "Ref=" "$(tail -1 ./inputs/${INSTR}.ref.txt)" 2> /dev/null;
fi
fi