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https://github.com/supleed2/ELEC50010-IAC-CW.git
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Rename initialisation files
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943745a1e0
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@ -13,8 +13,8 @@ module mips_cpu_memory(
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output logic[31:0] instr_readdata
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);
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parameter RAM_INIT_FILE = "";
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parameter MEM_INIT_FILE = "";
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parameter INSTR_INIT_FILE = "";
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parameter DATA_INIT_FILE = "";
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reg [31:0] data_memory [0:31];
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reg [31:0] instr_memory [0:31];
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@ -28,18 +28,18 @@ module mips_cpu_memory(
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instr_memory[i] = 0;
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end
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//Load contents from file if specified
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if (RAM_INIT_FILE != "") begin
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$display("RAM: Loading RAM contents from %s", RAM_INIT_FILE);
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$readmemh(RAM_INIT_FILE, instr_memory);
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if (INSTR_INIT_FILE != "") begin
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$display("RAM: Loading RAM contents from %s", INSTR_INIT_FILE);
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$readmemh(INSTR_INIT_FILE, instr_memory);
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end
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for (integer j = 0; j<$size(instr_memory); j++) begin
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$display("byte +%h: %h", 32'hBFC00000+j*4, instr_memory[j]);
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end
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if (MEM_INIT_FILE != "") begin
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$display("MEM: Loading MEM contents from %s", MEM_INIT_FILE);
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$readmemh(MEM_INIT_FILE, data_memory);
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if (DATA_INIT_FILE != "") begin
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$display("MEM: Loading MEM contents from %s", DATA_INIT_FILE);
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$readmemh(DATA_INIT_FILE, data_memory);
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end else begin
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$display("MEM FILE NOT GIVEN");
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end
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@ -36,15 +36,13 @@ always_ff @(posedge clk) begin
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end
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2'd2: begin // Jump
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pc_next <= {pc_lit_next[31:28], instr[25:0], 2'b00};
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$display("Im JUMPING");
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$display("JUMPING");
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$display("pc_lit_next: %h", pc_lit_next[31:28]);
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$display("instr: %b", instr[25:0]);
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$display("%h",pc_next);
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end
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2'd3: begin // Jump using Register
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pc_next <= reg_readdata;
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$display("Im JUMPING AROUND LOLOLOL");
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$display("%h",reg_readdata);
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end
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endcase
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end
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@ -21,18 +21,19 @@ INSTR=${2:-"No instruction specified: running all testcases"}; # e.g. addiu
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if [[ ${INSTR} == "No instruction specified: running all testcases" ]];
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then
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# All Testcase Files
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TESTCASES=$(find ./inputs ! -name '*ref*' ! -name '*log*' ! -name '*out*' ! -name 'inputs' ! -name 'data' | sed 's#.*/##');
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TESTCASES=$(find ./inputs ! -name '*ref*' ! -name '*log*' ! -name '*out*' ! -name '*inputs*' ! -name '*data*' | sed 's#.*/##');
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#echo ${TESTCASES}
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for TESTCASE in ${TESTCASES}
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do
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# Run Each Testcase File
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TESTCASE="${TESTCASE%%.*}";
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#echo ${TESTCASE};
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TESTCASE="${TESTCASE%%.*}";
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/mnt/c/Windows/System32/cmd.exe /C \
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iverilog -Wall -g2012 \
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-s mips_cpu_harvard_tb \
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-P mips_cpu_harvard_tb.RAM_INIT_FILE=\"inputs/${TESTCASE}.txt\" \
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-P mips_cpu_harvard_tb.MEM_INIT_FILE=\"inputs/${TESTCASE}.data.txt\" \
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-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${TESTCASE}.txt\" \
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-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${TESTCASE}.data.txt\" \
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-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \
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${SRC} 2> /dev/null
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/mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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@ -50,10 +51,10 @@ else
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/mnt/c/Windows/System32/cmd.exe /C \
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iverilog -Wall -g2012 \
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-s mips_cpu_harvard_tb \
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-P mips_cpu_harvard_tb.RAM_INIT_FILE=\"inputs/${INSTR}.txt\" \
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-P mips_cpu_harvard_tb.MEM_INIT_FILE=\"inputs/${INSTR}.data.txt\" \
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-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}.txt\" \
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-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}.data.txt\" \
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-o exec/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \
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${SRC} #2> /dev/null
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${SRC} 2> /dev/null
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/mnt/c/Windows/System32/cmd.exe /C vvp ./exec/mips_cpu_harvard_tb_${INSTR} &> ./inputs/${INSTR}.log.txt; # log file for debugging (contains $display)
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echo "$(tail -1 ./inputs/${INSTR}.log.txt)" > ./inputs/${INSTR}.out.txt; # register v0 output to compare with reference
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if diff -w ./inputs/${INSTR}.out.txt ./inputs/${INSTR}.ref.txt &> /dev/null # compare
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@ -1,13 +1,13 @@
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module mips_cpu_harvard_tb;
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parameter RAM_INIT_FILE = "inputs/addiu.txt";
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parameter MEM_INIT_FILE = "inputs/addiu.data.txt";
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parameter INSTR_INIT_FILE = "inputs/addiu.txt";
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parameter DATA_INIT_FILE = "inputs/addiu.data.txt";
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parameter TIMEOUT_CYCLES = 100;
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logic clk, clk_enable, reset, active, data_read, data_write;
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logic[31:0] register_v0, instr_address, instr_readdata, data_readdata, data_writedata, data_address;
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mips_cpu_memory #(RAM_INIT_FILE, MEM_INIT_FILE) ramInst(
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mips_cpu_memory #(INSTR_INIT_FILE, DATA_INIT_FILE) ramInst(
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.clk(clk),
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.data_address(data_address),
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.data_write(data_write),
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