2020-06-04 15:33:27 +00:00
|
|
|
/*
|
|
|
|
WARNING: Do NOT edit the input and output ports in this file in a text
|
|
|
|
editor if you plan to continue editing the block that represents it in
|
|
|
|
the Block Editor! File corruption is VERY likely to occur.
|
|
|
|
*/
|
|
|
|
/*
|
2020-06-09 21:45:20 +00:00
|
|
|
Copyright (C) 2019 Intel Corporation. All rights reserved.
|
2020-06-04 15:33:27 +00:00
|
|
|
Your use of Intel Corporation's design tools, logic functions
|
2020-06-09 21:45:20 +00:00
|
|
|
and other software and tools, and any partner logic
|
2020-06-04 15:33:27 +00:00
|
|
|
functions, and any output files from any of the foregoing
|
|
|
|
(including device programming or simulation files), and any
|
|
|
|
associated documentation or information are expressly subject
|
|
|
|
to the terms and conditions of the Intel Program License
|
|
|
|
Subscription Agreement, the Intel Quartus Prime License Agreement,
|
|
|
|
the Intel FPGA IP License Agreement, or other applicable license
|
|
|
|
agreement, including, without limitation, that your use is for
|
|
|
|
the sole purpose of programming logic devices manufactured by
|
|
|
|
Intel and sold by Intel or its authorized distributors. Please
|
2020-06-09 21:45:20 +00:00
|
|
|
refer to the applicable agreement for further details, at
|
|
|
|
https://fpgasoftware.intel.com/eula.
|
2020-06-04 15:33:27 +00:00
|
|
|
*/
|
|
|
|
(header "symbol" (version "1.2"))
|
|
|
|
(symbol
|
2020-06-10 13:02:15 +00:00
|
|
|
(rect 16 16 272 208)
|
2020-06-04 15:33:27 +00:00
|
|
|
(text "ALU_top" (rect 5 0 56 19)(font "Intel Clear" (font_size 8)))
|
2020-06-08 11:10:14 +00:00
|
|
|
(text "inst" (rect 8 171 24 188)(font "Intel Clear" ))
|
2020-06-04 15:33:27 +00:00
|
|
|
(port
|
|
|
|
(pt 0 32)
|
|
|
|
(input)
|
|
|
|
(text "ALU_en" (rect 0 0 46 19)(font "Intel Clear" (font_size 8)))
|
|
|
|
(text "ALU_en" (rect 21 27 67 46)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 0 32)(pt 16 32))
|
|
|
|
)
|
|
|
|
(port
|
|
|
|
(pt 0 48)
|
|
|
|
(input)
|
|
|
|
(text "Rs1[15..0]" (rect 0 0 61 19)(font "Intel Clear" (font_size 8)))
|
|
|
|
(text "Rs1[15..0]" (rect 21 43 82 62)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 0 48)(pt 16 48)(line_width 3))
|
|
|
|
)
|
|
|
|
(port
|
|
|
|
(pt 0 64)
|
|
|
|
(input)
|
|
|
|
(text "Rs2[15..0]" (rect 0 0 61 19)(font "Intel Clear" (font_size 8)))
|
|
|
|
(text "Rs2[15..0]" (rect 21 59 82 78)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 0 64)(pt 16 64)(line_width 3))
|
|
|
|
)
|
|
|
|
(port
|
|
|
|
(pt 0 80)
|
|
|
|
(input)
|
|
|
|
(text "Rd[15..0]" (rect 0 0 55 19)(font "Intel Clear" (font_size 8)))
|
|
|
|
(text "Rd[15..0]" (rect 21 75 76 94)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 0 80)(pt 16 80)(line_width 3))
|
|
|
|
)
|
|
|
|
(port
|
|
|
|
(pt 0 96)
|
|
|
|
(input)
|
|
|
|
(text "op[5..0]" (rect 0 0 46 19)(font "Intel Clear" (font_size 8)))
|
|
|
|
(text "op[5..0]" (rect 21 91 67 110)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 0 96)(pt 16 96)(line_width 3))
|
|
|
|
)
|
|
|
|
(port
|
|
|
|
(pt 0 112)
|
|
|
|
(input)
|
|
|
|
(text "EXEC2" (rect 0 0 38 19)(font "Intel Clear" (font_size 8)))
|
|
|
|
(text "EXEC2" (rect 21 107 59 126)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 0 112)(pt 16 112))
|
|
|
|
)
|
2020-06-07 19:51:33 +00:00
|
|
|
(port
|
|
|
|
(pt 0 128)
|
|
|
|
(input)
|
2020-06-08 11:10:14 +00:00
|
|
|
(text "stack_data[15..0]" (rect 0 0 103 19)(font "Intel Clear" (font_size 8)))
|
|
|
|
(text "stack_data[15..0]" (rect 21 123 124 142)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 0 128)(pt 16 128)(line_width 3))
|
|
|
|
)
|
|
|
|
(port
|
|
|
|
(pt 0 144)
|
|
|
|
(input)
|
2020-06-10 13:02:15 +00:00
|
|
|
(text "memdatain[15..0]" (rect 0 0 107 19)(font "Intel Clear" (font_size 8)))
|
|
|
|
(text "memdatain[15..0]" (rect 21 139 128 158)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 0 144)(pt 16 144)(line_width 3))
|
|
|
|
)
|
|
|
|
(port
|
|
|
|
(pt 0 160)
|
|
|
|
(input)
|
2020-06-07 19:51:33 +00:00
|
|
|
(text "CLK" (rect 0 0 23 19)(font "Intel Clear" (font_size 8)))
|
2020-06-10 13:02:15 +00:00
|
|
|
(text "CLK" (rect 21 155 44 174)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 0 160)(pt 16 160))
|
2020-06-07 19:51:33 +00:00
|
|
|
)
|
2020-06-04 15:33:27 +00:00
|
|
|
(port
|
2020-06-10 13:02:15 +00:00
|
|
|
(pt 256 32)
|
2020-06-04 15:33:27 +00:00
|
|
|
(output)
|
2020-06-09 21:45:20 +00:00
|
|
|
(text "mul1[15..0]" (rect 0 0 69 19)(font "Intel Clear" (font_size 8)))
|
2020-06-10 13:02:15 +00:00
|
|
|
(text "mul1[15..0]" (rect 166 27 235 46)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 256 32)(pt 240 32)(line_width 3))
|
2020-06-04 15:33:27 +00:00
|
|
|
)
|
|
|
|
(port
|
2020-06-10 13:02:15 +00:00
|
|
|
(pt 256 48)
|
2020-06-04 15:33:27 +00:00
|
|
|
(output)
|
2020-06-09 21:45:20 +00:00
|
|
|
(text "mul2[15..0]" (rect 0 0 69 19)(font "Intel Clear" (font_size 8)))
|
2020-06-10 13:02:15 +00:00
|
|
|
(text "mul2[15..0]" (rect 166 43 235 62)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 256 48)(pt 240 48)(line_width 3))
|
2020-06-04 15:33:27 +00:00
|
|
|
)
|
|
|
|
(port
|
2020-06-10 13:02:15 +00:00
|
|
|
(pt 256 64)
|
2020-06-04 15:33:27 +00:00
|
|
|
(output)
|
2020-06-09 21:45:20 +00:00
|
|
|
(text "Rout[15..0]" (rect 0 0 66 19)(font "Intel Clear" (font_size 8)))
|
2020-06-10 13:02:15 +00:00
|
|
|
(text "Rout[15..0]" (rect 169 59 235 78)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 256 64)(pt 240 64)(line_width 3))
|
2020-06-08 11:10:14 +00:00
|
|
|
)
|
|
|
|
(port
|
2020-06-10 13:02:15 +00:00
|
|
|
(pt 256 80)
|
2020-06-08 11:10:14 +00:00
|
|
|
(output)
|
2020-06-09 21:45:20 +00:00
|
|
|
(text "COND" (rect 0 0 36 19)(font "Intel Clear" (font_size 8)))
|
2020-06-10 13:02:15 +00:00
|
|
|
(text "COND" (rect 199 75 235 94)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 256 80)(pt 240 80))
|
2020-06-09 21:45:20 +00:00
|
|
|
)
|
|
|
|
(port
|
2020-06-10 13:02:15 +00:00
|
|
|
(pt 256 96)
|
2020-06-09 21:45:20 +00:00
|
|
|
(output)
|
|
|
|
(text "CARRY" (rect 0 0 41 19)(font "Intel Clear" (font_size 8)))
|
2020-06-10 13:02:15 +00:00
|
|
|
(text "CARRY" (rect 194 91 235 110)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 256 96)(pt 240 96))
|
2020-06-09 21:45:20 +00:00
|
|
|
)
|
|
|
|
(port
|
2020-06-10 13:02:15 +00:00
|
|
|
(pt 256 112)
|
2020-06-09 21:45:20 +00:00
|
|
|
(output)
|
|
|
|
(text "jumpflags[7..0]" (rect 0 0 89 19)(font "Intel Clear" (font_size 8)))
|
2020-06-10 13:02:15 +00:00
|
|
|
(text "jumpflags[7..0]" (rect 146 107 235 126)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 256 112)(pt 240 112)(line_width 3))
|
|
|
|
)
|
|
|
|
(port
|
|
|
|
(pt 256 128)
|
|
|
|
(output)
|
|
|
|
(text "memaddr[10..0]" (rect 0 0 97 19)(font "Intel Clear" (font_size 8)))
|
|
|
|
(text "memaddr[10..0]" (rect 138 123 235 142)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 256 128)(pt 240 128)(line_width 3))
|
2020-06-09 21:45:20 +00:00
|
|
|
)
|
|
|
|
(port
|
2020-06-10 13:02:15 +00:00
|
|
|
(pt 256 144)
|
2020-06-09 21:45:20 +00:00
|
|
|
(output)
|
2020-06-08 11:10:14 +00:00
|
|
|
(text "MUL_res[31..0]" (rect 0 0 90 19)(font "Intel Clear" (font_size 8)))
|
2020-06-10 13:02:15 +00:00
|
|
|
(text "MUL_res[31..0]" (rect 145 139 235 158)(font "Intel Clear" (font_size 8)))
|
|
|
|
(line (pt 256 144)(pt 240 144)(line_width 3))
|
2020-06-04 15:33:27 +00:00
|
|
|
)
|
|
|
|
(drawing
|
2020-06-10 13:02:15 +00:00
|
|
|
(rectangle (rect 16 16 240 176))
|
2020-06-04 15:33:27 +00:00
|
|
|
)
|
|
|
|
)
|