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https://github.com/supleed2/ELEC40006-P1-CW.git
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Debugging CPU
This commit is contained in:
Kacper
parent
94124c5a0e
commit
b527d5e77d
42
ALU_top.bdf
42
ALU_top.bdf
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@ -23,7 +23,7 @@ refer to the applicable agreement for further details.
|
|||
(input)
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||||
(rect 360 240 528 256)
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||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
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||||
(text "ALU_en" (rect 5 0 44 12)(font "Arial" ))
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||||
(text "ALU_en" (rect 5 0 43 12)(font "Arial" ))
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@ -39,7 +39,7 @@ refer to the applicable agreement for further details.
|
|||
(input)
|
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(rect 360 256 528 272)
|
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(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
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@ -55,7 +55,7 @@ refer to the applicable agreement for further details.
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|||
(input)
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(rect 360 272 528 288)
|
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(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
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@ -71,7 +71,7 @@ refer to the applicable agreement for further details.
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|||
(input)
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(rect 360 288 528 304)
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||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
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(text "Rd[15..0]" (rect 5 0 48 17)(font "Intel Clear" ))
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@ -87,7 +87,7 @@ refer to the applicable agreement for further details.
|
|||
(input)
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||||
(rect 360 304 528 320)
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||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
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||||
(text "op[5..0]" (rect 5 0 41 17)(font "Intel Clear" ))
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(text "op[5..0]" (rect 5 0 40 17)(font "Intel Clear" ))
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@ -103,7 +103,23 @@ refer to the applicable agreement for further details.
|
|||
(input)
|
||||
(rect 360 336 528 352)
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||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
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(text "EXEC2" (rect 5 0 37 17)(font "Intel Clear" ))
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(text "EXEC2" (rect 5 0 36 17)(font "Intel Clear" ))
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)
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(text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6)))
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)
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(pin
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(input)
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(rect 336 448 504 464)
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(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
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(text "CLK" (rect 5 0 27 12)(font "Arial" ))
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@ -256,35 +272,35 @@ refer to the applicable agreement for further details.
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|||
(pt 208 32)
|
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(output)
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||||
(text "mul1[15..0]" (rect 0 0 55 12)(font "Arial" ))
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(text "mul1[15..0]" (rect 141 27 187 39)(font "Arial" ))
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)
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(port
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(output)
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(output)
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(text "Rout[15..0]" (rect 0 0 55 12)(font "Arial" ))
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(output)
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(output)
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(text "carry" (rect 0 0 25 12)(font "Arial" ))
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@ -407,3 +423,7 @@ refer to the applicable agreement for further details.
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|||
(pt 752 312)
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(pt 776 312)
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)
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@ -65,6 +65,13 @@ refer to the applicable agreement for further details.
|
|||
(text "EXEC2" (rect 21 107 59 126)(font "Intel Clear" (font_size 8)))
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||||
(line (pt 0 112)(pt 16 112))
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)
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(port
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(pt 0 128)
|
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(input)
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(text "CLK" (rect 0 0 23 19)(font "Intel Clear" (font_size 8)))
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(output)
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||||
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1652
CPUProject.bdf
1652
CPUProject.bdf
File diff suppressed because it is too large
Load diff
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@ -38,13 +38,17 @@
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set_global_assignment -name FAMILY "Cyclone IV E"
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set_global_assignment -name DEVICE AUTO
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set_global_assignment -name TOP_LEVEL_ENTITY test
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set_global_assignment -name TOP_LEVEL_ENTITY CPUProject
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 18.1.0
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:38:11 MAY 20, 2020"
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set_global_assignment -name LAST_QUARTUS_VERSION "18.1.0 Standard Edition"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name TIMING_ANALYZER_MULTICORNER_ANALYSIS ON
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set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name VERILOG_FILE LIFOstack.v
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set_global_assignment -name VERILOG_FILE alu.v
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set_global_assignment -name MIF_FILE LUTSquares.mif
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set_global_assignment -name BDF_FILE mul8.bdf
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@ -63,8 +67,5 @@ set_global_assignment -name VERILOG_FILE SM.v
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set_global_assignment -name BDF_FILE ALU_top.bdf
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set_global_assignment -name VERILOG_FILE mux_8x16.v
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set_global_assignment -name VERILOG_FILE mux_3x16.v
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set_global_assignment -name BDF_FILE test.bdf
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name VECTOR_WAVEFORM_FILE Waveform.vwf
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
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BIN
CPUProject.qws
Normal file
BIN
CPUProject.qws
Normal file
Binary file not shown.
25
DECODE.bsf
25
DECODE.bsf
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@ -33,24 +33,31 @@ refer to the applicable agreement for further details.
|
|||
(port
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||||
(pt 0 48)
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||||
(input)
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||||
(text "EXEC1" (rect 0 0 30 12)(font "Arial" ))
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||||
(text "EXEC1" (rect 21 43 51 55)(font "Arial" ))
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(text "FETCH" (rect 0 0 33 12)(font "Arial" ))
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(text "FETCH" (rect 21 43 54 55)(font "Arial" ))
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(line (pt 0 48)(pt 16 48)(line_width 1))
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||||
)
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||||
(port
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||||
(pt 0 64)
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||||
(input)
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||||
(text "EXEC2" (rect 0 0 31 12)(font "Arial" ))
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||||
(text "EXEC2" (rect 21 59 52 71)(font "Arial" ))
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||||
(text "EXEC1" (rect 0 0 30 12)(font "Arial" ))
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||||
(text "EXEC1" (rect 21 59 51 71)(font "Arial" ))
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||||
(line (pt 0 64)(pt 16 64)(line_width 1))
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||||
)
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||||
(port
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(pt 0 80)
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(input)
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(text "COND_result" (rect 0 0 55 12)(font "Arial" ))
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(text "COND_result" (rect 21 75 76 87)(font "Arial" ))
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(text "EXEC2" (rect 0 0 31 12)(font "Arial" ))
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(text "EXEC2" (rect 21 75 52 87)(font "Arial" ))
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||||
(line (pt 0 80)(pt 16 80)(line_width 1))
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||||
)
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(port
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(pt 0 96)
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(input)
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(text "COND_result" (rect 0 0 55 12)(font "Arial" ))
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||||
(text "COND_result" (rect 21 91 76 103)(font "Arial" ))
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(line (pt 0 96)(pt 16 96)(line_width 1))
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||||
)
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||||
(port
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||||
(pt 208 32)
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||||
(output)
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||||
|
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@ -138,9 +145,9 @@ refer to the applicable agreement for further details.
|
|||
(port
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||||
(pt 208 224)
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||||
(output)
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||||
(text "s4" (rect 0 0 10 12)(font "Arial" ))
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||||
(text "s4" (rect 177 219 187 231)(font "Arial" ))
|
||||
(line (pt 208 224)(pt 192 224)(line_width 1))
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||||
(text "s4[1..0]" (rect 0 0 29 12)(font "Arial" ))
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||||
(text "s4[1..0]" (rect 158 219 187 231)(font "Arial" ))
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||||
(line (pt 208 224)(pt 192 224)(line_width 3))
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||||
)
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||||
(port
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||||
(pt 208 240)
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||||
|
|
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44
DECODE.v
44
DECODE.v
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@ -1,6 +1,7 @@
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module DECODE
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(
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input [15:0] instr,
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input FETCH,
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input EXEC1,
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input EXEC2,
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input COND_result,
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@ -16,7 +17,7 @@ module DECODE
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output [2:0] s1,
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output [2:0] s2,
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output [2:0] s3,
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output s4,
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output [1:0]s4,
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output RAMd_wren,
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output RAMd_en,
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output RAMi_en,
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@ -39,25 +40,25 @@ module DECODE
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//Different opcodes (refer to documentation):
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wire LOAD = msb & ~ls;
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wire STORE = msb & ls;
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wire UJMP = ~op[5] & ~op[4] & ~op[3] & ~op[2];
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wire JMP = (~op[5] & ~op[4] & ~op[3] & op[2]) | (~op[5] & ~op[4] & op[3] & ~op[2]);
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wire MUL = ~op[5] & op[4] & op[3] & op[2] & ~op[1] & ~op[0];
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wire MLA = ~op[5] & op[4] & op[3] & op[2] & ~op[1] & op[0];
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wire MLS = ~op[5] & op[4] & op[3] & op[2] & op[1] & ~op[0];
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wire PSH = op[5] & ~op[4] & op[3] & ~op[2] & ~op[1] & ~op[0];
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wire POP = op[5] & ~op[4] & op[3] & ~op[2] & ~op[1] & op[0];
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wire NOP = op[5] & op[4] & op[3] & op[2] & op[1] & ~op[0];
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wire STP = op[5] & op[4] & op[3] & op[2] & op[1] & op[0];
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wire UJMP = ~msb & ~op[5] & ~op[4] & ~op[3] & ~op[2];
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wire JMP = ~msb & (~op[5] & ~op[4] & ~op[3] & op[2]) | (~op[5] & ~op[4] & op[3] & ~op[2]);
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wire MUL = ~msb & ~op[5] & op[4] & op[3] & op[2] & ~op[1] & ~op[0];
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wire MLA = ~msb & ~op[5] & op[4] & op[3] & op[2] & ~op[1] & op[0];
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wire MLS = ~msb & ~op[5] & op[4] & op[3] & op[2] & op[1] & ~op[0];
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wire PSH = ~msb & op[5] & ~op[4] & op[3] & ~op[2] & ~op[1] & ~op[0];
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wire POP = ~msb & op[5] & ~op[4] & op[3] & ~op[2] & ~op[1] & op[0];
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wire NOP = ~msb & op[5] & op[4] & op[3] & op[2] & op[1] & ~op[0];
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wire STP = ~msb & op[5] & op[4] & op[3] & op[2] & op[1] & op[0];
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assign R0_count = EXEC1 & (~(UJMP | JMP | STP));
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assign R0_en = EXEC1 & (~(STORE | NOP | STP) & ~Rd[2] & ~Rd[1] & ~Rd[0] | UJMP | JMP & COND_result) | EXEC2 & LOAD & ~Rls[2] & ~Rls[1] & ~Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & ~Rd[2] & ~Rd[1] & ~Rd[0];
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assign R1_en = EXEC1 & ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & ~Rd[2] & ~Rd[1] & Rd[0] | EXEC2 & LOAD & ~Rls[2] & ~Rls[1] & Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & ~Rd[2] & ~Rd[1] & Rd[0];
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assign R2_en = EXEC1 & ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & ~Rd[2] & Rd[1] & ~Rd[0] | EXEC2 & LOAD & ~Rls[2] & Rls[1] & ~Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & ~Rd[2] & Rd[1] & ~Rd[0];
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assign R3_en = EXEC1 & ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & ~Rd[2] & Rd[1] & Rd[0] | EXEC2 & LOAD & ~Rls[2] & Rls[1] & Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & ~Rd[2] & Rd[1] & Rd[0];
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assign R4_en = EXEC1 & ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & Rd[2] & ~Rd[1] & ~Rd[0] | EXEC2 & LOAD & Rls[2] & ~Rls[1] & ~Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & Rd[2] & ~Rd[1] & ~Rd[0];
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assign R5_en = EXEC1 & ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & Rd[2] & ~Rd[1] & Rd[0] | EXEC2 & LOAD & Rls[2] & ~Rls[1] & Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & Rd[2] & ~Rd[1] & Rd[0];
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assign R6_en = EXEC1 & ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & Rd[2] & Rd[1] & ~Rd[0] | EXEC2 & LOAD & Rls[2] & Rls[1] & ~Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & Rd[2] & Rd[1] & ~Rd[0];
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assign R7_en = EXEC1 & ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & Rd[2] & Rd[1] & Rd[0] | EXEC2 & LOAD & Rls[2] & Rls[1] & Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & Rd[2] & Rd[1] & Rd[0];
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assign R0_count = EXEC1 & (~(UJMP | JMP & ~COND_result | STP));
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assign R0_en = EXEC1 & (~(STORE | NOP | STP | LOAD) & ~Rd[2] & ~Rd[1] & ~Rd[0] | UJMP | JMP & COND_result) | EXEC2 & LOAD & ~Rls[2] & ~Rls[1] & ~Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & ~Rd[2] & ~Rd[1] & ~Rd[0];
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assign R1_en = ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & ~Rd[2] & ~Rd[1] & Rd[0] | EXEC2 & LOAD & ~Rls[2] & ~Rls[1] & Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & ~Rd[2] & ~Rd[1] & Rd[0];
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assign R2_en = ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & ~Rd[2] & Rd[1] & ~Rd[0] | EXEC2 & LOAD & ~Rls[2] & Rls[1] & ~Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & ~Rd[2] & Rd[1] & ~Rd[0];
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assign R3_en = ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & ~Rd[2] & Rd[1] & Rd[0] | EXEC2 & LOAD & ~Rls[2] & Rls[1] & Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & ~Rd[2] & Rd[1] & Rd[0];
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assign R4_en = ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & Rd[2] & ~Rd[1] & ~Rd[0] | EXEC2 & LOAD & Rls[2] & ~Rls[1] & ~Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & Rd[2] & ~Rd[1] & ~Rd[0];
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assign R5_en = ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & Rd[2] & ~Rd[1] & Rd[0] | EXEC2 & LOAD & Rls[2] & ~Rls[1] & Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & Rd[2] & ~Rd[1] & Rd[0];
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assign R6_en = ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & Rd[2] & Rd[1] & ~Rd[0] | EXEC2 & LOAD & Rls[2] & Rls[1] & ~Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & Rd[2] & Rd[1] & ~Rd[0];
|
||||
assign R7_en = ~(UJMP | JMP | STORE | LOAD | MUL | MLA | MLS | NOP | STP | POP) & Rd[2] & Rd[1] & Rd[0] | EXEC2 & LOAD & Rls[2] & Rls[1] & Rls[0] | EXEC2 & (MUL | MLA | MLS | POP) & Rd[2] & Rd[1] & Rd[0];
|
||||
assign s1[2] = EXEC1 & ((~(UJMP | JMP | STORE | LOAD | NOP | STP | PSH | POP) & Rs1[2]) | (STORE & Rls[2]) | (PSH & Rs1[2]));
|
||||
assign s1[1] = EXEC1 & ((~(UJMP | JMP | STORE | LOAD | NOP | STP | PSH | POP) & Rs1[1]) | (STORE & Rls[1]) | (PSH & Rs1[1]));
|
||||
assign s1[0] = EXEC1 & ((~(UJMP | JMP | STORE | LOAD | NOP | STP | PSH | POP) & Rs1[0]) | (STORE & Rls[0]) | (PSH & Rs1[0]));
|
||||
|
|
@ -67,10 +68,11 @@ module DECODE
|
|||
assign s3[2] = EXEC1 & ((~(UJMP | JMP | STORE | LOAD | NOP | STP | PSH | POP)) & Rd[2]);
|
||||
assign s3[1] = EXEC1 & ((~(UJMP | JMP | STORE | LOAD | NOP | STP | PSH | POP)) & Rd[1]);
|
||||
assign s3[0] = EXEC1 & ((~(UJMP | JMP | STORE | LOAD | NOP | STP | PSH | POP)) & Rd[0]);
|
||||
assign s4 = EXEC1 & ~(LOAD | STORE);
|
||||
assign s4[1] = POP | PSH;
|
||||
assign s4[0] = ~(LOAD | POP | PSH);
|
||||
assign RAMd_wren = EXEC1 & STORE;
|
||||
assign RAMd_en = EXEC1 & (STORE | LOAD);
|
||||
assign RAMi_en = EXEC1 & ~STP | EXEC2 & (LOAD | MUL | MLA | MLS);
|
||||
assign RAMi_en = FETCH;
|
||||
assign ALU_en = LOAD | STORE;
|
||||
assign E2 = EXEC1 & (LOAD | MUL | MLA | MLS | POP);
|
||||
assign stack_en = (EXEC1 & PSH) | POP;
|
||||
|
|
|
|||
7
SM.bsf
7
SM.bsf
|
|
@ -37,6 +37,13 @@ refer to the applicable agreement for further details.
|
|||
(text "E2" (rect 21 43 32 55)(font "Arial" ))
|
||||
(line (pt 0 48)(pt 16 48)(line_width 1))
|
||||
)
|
||||
(port
|
||||
(pt 0 64)
|
||||
(input)
|
||||
(text "RST" (rect 0 0 20 12)(font "Arial" ))
|
||||
(text "RST" (rect 21 59 41 71)(font "Arial" ))
|
||||
(line (pt 0 64)(pt 16 64)(line_width 1))
|
||||
)
|
||||
(port
|
||||
(pt 152 32)
|
||||
(output)
|
||||
|
|
|
|||
7
SM.v
7
SM.v
|
|
@ -2,6 +2,7 @@ module SM
|
|||
(
|
||||
input CLK,
|
||||
input E2,
|
||||
input RST,
|
||||
output FETCH,
|
||||
output EXEC1,
|
||||
output EXEC2
|
||||
|
|
@ -11,9 +12,9 @@ reg [2:0]s = 3'b1; //current state initialised to 001
|
|||
|
||||
always @(posedge CLK) //Change on rising edge of clock
|
||||
begin
|
||||
s[2] <= ~s[2] & s[1] & ~s[0] & E2;
|
||||
s[1] <= ~s[2] & ~s[1] & s[0];
|
||||
s[0] <= (~s[2] & s[1] & ~s[0] & ~E2) | (s[2] & ~s[1] & ~s[0]);
|
||||
s[2] <= ~s[2] & s[1] & ~s[0] & E2 & ~RST;
|
||||
s[1] <= ~s[2] & ~s[1] & s[0] & ~RST;
|
||||
s[0] <= (~s[2] & s[1] & ~s[0] & ~E2) | (s[2] & ~s[1] & ~s[0]) | RST;
|
||||
end
|
||||
|
||||
assign FETCH = s[0];
|
||||
|
|
|
|||
19
data.mif
19
data.mif
|
|
@ -21,5 +21,22 @@ ADDRESS_RADIX=HEX;
|
|||
DATA_RADIX=HEX;
|
||||
|
||||
CONTENT BEGIN
|
||||
[000..7FF] : 0000;
|
||||
000 : 0002;
|
||||
001 : 0003;
|
||||
002 : 0000;
|
||||
003 : FFFF;
|
||||
004 : BFFF;
|
||||
005 : 000A;
|
||||
006 : 001B;
|
||||
007 : 001E;
|
||||
008 : 0021;
|
||||
009 : 0024;
|
||||
00A : 0027;
|
||||
00B : 0000;
|
||||
00C : 002B;
|
||||
00D : 002E;
|
||||
00E : 0031;
|
||||
00F : 0036;
|
||||
010 : AAAA;
|
||||
[011..7FF] : 0000;
|
||||
END;
|
||||
|
|
|
|||
66
instr.mif
66
instr.mif
|
|
@ -21,5 +21,69 @@ ADDRESS_RADIX=HEX;
|
|||
DATA_RADIX=HEX;
|
||||
|
||||
CONTENT BEGIN
|
||||
[000..7FF] : 0000;
|
||||
000 : 8800;
|
||||
001 : 9001;
|
||||
002 : 26D0;
|
||||
003 : 291A;
|
||||
004 : 2D00;
|
||||
005 : 3161;
|
||||
006 : 3440;
|
||||
007 : 3993;
|
||||
008 : 3AA5;
|
||||
009 : D003;
|
||||
00A : 3CE2;
|
||||
00B : A003;
|
||||
00C : 9804;
|
||||
00D : 38A5;
|
||||
00E : 3FC0;
|
||||
00F : 419F;
|
||||
010 : 304F;
|
||||
011 : 5008;
|
||||
012 : 5028;
|
||||
013 : 284F;
|
||||
014 : 43F7;
|
||||
015 : 3540;
|
||||
016 : 47F5;
|
||||
017 : 484D;
|
||||
018 : 8806;
|
||||
019 : 0040;
|
||||
01A : B800;
|
||||
01B : 8807;
|
||||
01C : 085A;
|
||||
01D : B800;
|
||||
01E : 8808;
|
||||
01F : 0A7D;
|
||||
020 : B800;
|
||||
021 : 8809;
|
||||
022 : 0C53;
|
||||
023 : B801;
|
||||
024 : 880A;
|
||||
025 : B00B;
|
||||
026 : 0E70;
|
||||
027 : B800;
|
||||
028 : 880C;
|
||||
029 : 1063;
|
||||
02A : B800;
|
||||
02B : 880D;
|
||||
02C : 126D;
|
||||
02D : B800;
|
||||
02E : 880E;
|
||||
02F : 147A;
|
||||
030 : B800;
|
||||
031 : 880F;
|
||||
032 : 5340;
|
||||
033 : 53C0;
|
||||
034 : 1678;
|
||||
035 : B800;
|
||||
036 : 1863;
|
||||
037 : 1A5A;
|
||||
038 : 1FB8;
|
||||
039 : 7C00;
|
||||
03A : 1C77;
|
||||
03B : 204C;
|
||||
03C : A810;
|
||||
03D : 226D;
|
||||
03E : 246D;
|
||||
03F : 7E00;
|
||||
[040..7FF] : 0000;
|
||||
END;
|
||||
|
|
|
|||
183
reg_file.bdf
183
reg_file.bdf
|
|
@ -23,7 +23,7 @@ refer to the applicable agreement for further details.
|
|||
(input)
|
||||
(rect 112 136 280 152)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "CLK" (rect 5 0 26 17)(font "Intel Clear" ))
|
||||
(text "CLK" (rect 5 0 25 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -39,7 +39,7 @@ refer to the applicable agreement for further details.
|
|||
(input)
|
||||
(rect 184 208 352 224)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R0_en" (rect 5 0 37 12)(font "Arial" ))
|
||||
(text "R0_en" (rect 5 0 36 12)(font "Arial" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -55,7 +55,7 @@ refer to the applicable agreement for further details.
|
|||
(input)
|
||||
(rect 184 320 352 336)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R0_count" (rect 5 0 50 17)(font "Intel Clear" ))
|
||||
(text "R0_count" (rect 5 0 49 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -69,9 +69,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 424 328 440)
|
||||
(rect 160 472 328 488)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R1_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(text "R1_en" (rect 5 0 35 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -85,9 +85,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 576 328 592)
|
||||
(rect 160 624 328 640)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R2_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(text "R2_en" (rect 5 0 35 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -101,9 +101,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 728 328 744)
|
||||
(rect 160 776 328 792)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R3_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(text "R3_en" (rect 5 0 35 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -117,9 +117,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 880 328 896)
|
||||
(rect 160 928 328 944)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R4_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(text "R4_en" (rect 5 0 35 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -133,9 +133,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 1032 328 1048)
|
||||
(rect 160 1080 328 1096)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R5_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(text "R5_en" (rect 5 0 35 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -149,9 +149,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 1184 328 1200)
|
||||
(rect 160 1232 328 1248)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R6_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(text "R6_en" (rect 5 0 35 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -165,9 +165,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 160 1336 328 1352)
|
||||
(rect 160 1384 328 1400)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R7_en" (rect 5 0 36 17)(font "Intel Clear" ))
|
||||
(text "R7_en" (rect 5 0 35 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -183,7 +183,7 @@ refer to the applicable agreement for further details.
|
|||
(input)
|
||||
(rect 184 240 352 256)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R0_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(text "R0_in[15..0]" (rect 5 0 61 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -197,9 +197,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 144 408 312 424)
|
||||
(rect 160 440 328 456)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R1_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(text "R1_in[15..0]" (rect 5 0 61 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -213,9 +213,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 144 560 312 576)
|
||||
(rect 160 592 328 608)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R2_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(text "R2_in[15..0]" (rect 5 0 61 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -229,9 +229,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 144 712 312 728)
|
||||
(rect 160 744 328 760)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R3_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(text "R3_in[15..0]" (rect 5 0 61 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -245,9 +245,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 144 864 312 880)
|
||||
(rect 160 896 328 912)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R4_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(text "R4_in[15..0]" (rect 5 0 61 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -261,9 +261,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 144 1016 312 1032)
|
||||
(rect 160 1048 328 1064)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R5_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(text "R5_in[15..0]" (rect 5 0 61 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -277,9 +277,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 144 1168 312 1184)
|
||||
(rect 160 1200 328 1216)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R6_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(text "R6_in[15..0]" (rect 5 0 61 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -293,9 +293,9 @@ refer to the applicable agreement for further details.
|
|||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 144 1320 312 1336)
|
||||
(rect 160 1352 328 1368)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "R7_in[15..0]" (rect 5 0 62 17)(font "Intel Clear" ))
|
||||
(text "R7_in[15..0]" (rect 5 0 61 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
|
|
@ -634,7 +634,6 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
|
@ -650,6 +649,7 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
|
@ -746,7 +746,6 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
|
@ -762,6 +761,7 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
|
@ -858,7 +858,6 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
|
@ -874,6 +873,7 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
|
@ -970,7 +970,6 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
|
@ -986,6 +985,7 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
|
@ -1082,7 +1082,6 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
|
@ -1098,6 +1097,7 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
|
@ -1194,7 +1194,6 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
|
@ -1210,6 +1209,7 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
|
@ -1306,7 +1306,6 @@ refer to the applicable agreement for further details.
|
|||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(text "enable" (rect 20 97 57 111)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 104)(pt 16 104))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 120)
|
||||
|
|
@ -1322,6 +1321,7 @@ refer to the applicable agreement for further details.
|
|||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(text "sload" (rect 20 49 50 63)(font "Arial" (font_size 8)))
|
||||
(line (pt 0 56)(pt 16 56))
|
||||
(unused)
|
||||
)
|
||||
(port
|
||||
(pt 0 40)
|
||||
|
|
@ -1556,111 +1556,6 @@ refer to the applicable agreement for further details.
|
|||
(pt 672 432)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 600)
|
||||
(pt 320 600)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 448)
|
||||
(pt 320 416)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 448)
|
||||
(pt 320 448)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 416)
|
||||
(pt 312 416)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 600)
|
||||
(pt 320 568)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 568)
|
||||
(pt 312 568)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 752)
|
||||
(pt 320 720)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 752)
|
||||
(pt 320 752)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 720)
|
||||
(pt 312 720)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 904)
|
||||
(pt 320 872)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 904)
|
||||
(pt 320 904)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 872)
|
||||
(pt 312 872)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 1056)
|
||||
(pt 320 1024)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 1056)
|
||||
(pt 320 1056)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 1024)
|
||||
(pt 312 1024)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 1208)
|
||||
(pt 320 1176)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 1208)
|
||||
(pt 320 1208)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 1176)
|
||||
(pt 312 1176)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 1360)
|
||||
(pt 320 1328)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 328 1360)
|
||||
(pt 320 1360)
|
||||
(bus)
|
||||
)
|
||||
(connector
|
||||
(pt 320 1328)
|
||||
(pt 312 1328)
|
||||
(bus)
|
||||
)
|
||||
(junction (pt 128 1224))
|
||||
(junction (pt 128 1072))
|
||||
(junction (pt 128 920))
|
||||
|
|
|
|||
127
test.bdf
127
test.bdf
|
|
@ -1,127 +0,0 @@
|
|||
/*
|
||||
WARNING: Do NOT edit the input and output ports in this file in a text
|
||||
editor if you plan to continue editing the block that represents it in
|
||||
the Block Editor! File corruption is VERY likely to occur.
|
||||
*/
|
||||
/*
|
||||
Copyright (C) 2018 Intel Corporation. All rights reserved.
|
||||
Your use of Intel Corporation's design tools, logic functions
|
||||
and other software and tools, and its AMPP partner logic
|
||||
functions, and any output files from any of the foregoing
|
||||
(including device programming or simulation files), and any
|
||||
associated documentation or information are expressly subject
|
||||
to the terms and conditions of the Intel Program License
|
||||
Subscription Agreement, the Intel Quartus Prime License Agreement,
|
||||
the Intel FPGA IP License Agreement, or other applicable license
|
||||
agreement, including, without limitation, that your use is for
|
||||
the sole purpose of programming logic devices manufactured by
|
||||
Intel and sold by Intel or its authorized distributors. Please
|
||||
refer to the applicable agreement for further details.
|
||||
*/
|
||||
(header "graphic" (version "1.4"))
|
||||
(pin
|
||||
(input)
|
||||
(rect 176 288 344 304)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "A" (rect 5 0 14 12)(font "Arial" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
(line (pt 84 4)(pt 109 4))
|
||||
(line (pt 113 8)(pt 168 8))
|
||||
(line (pt 84 12)(pt 84 4))
|
||||
(line (pt 109 4)(pt 113 8))
|
||||
(line (pt 109 12)(pt 113 8))
|
||||
)
|
||||
(text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6)))
|
||||
)
|
||||
(pin
|
||||
(input)
|
||||
(rect 176 304 344 320)
|
||||
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
|
||||
(text "B" (rect 5 0 13 17)(font "Intel Clear" ))
|
||||
(pt 168 8)
|
||||
(drawing
|
||||
(line (pt 84 12)(pt 109 12))
|
||||
(line (pt 84 4)(pt 109 4))
|
||||
(line (pt 113 8)(pt 168 8))
|
||||
(line (pt 84 12)(pt 84 4))
|
||||
(line (pt 109 4)(pt 113 8))
|
||||
(line (pt 109 12)(pt 113 8))
|
||||
)
|
||||
(text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6)))
|
||||
)
|
||||
(pin
|
||||
(output)
|
||||
(rect 464 296 640 312)
|
||||
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
|
||||
(text "OUT1" (rect 90 0 117 17)(font "Intel Clear" ))
|
||||
(pt 0 8)
|
||||
(drawing
|
||||
(line (pt 0 8)(pt 52 8))
|
||||
(line (pt 52 4)(pt 78 4))
|
||||
(line (pt 52 12)(pt 78 12))
|
||||
(line (pt 52 12)(pt 52 4))
|
||||
(line (pt 78 4)(pt 82 8))
|
||||
(line (pt 82 8)(pt 78 12))
|
||||
(line (pt 78 12)(pt 82 8))
|
||||
)
|
||||
)
|
||||
(pin
|
||||
(output)
|
||||
(rect 536 208 712 224)
|
||||
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
|
||||
(text "OUT2" (rect 90 0 118 12)(font "Arial" ))
|
||||
(pt 0 8)
|
||||
(drawing
|
||||
(line (pt 0 8)(pt 52 8))
|
||||
(line (pt 52 4)(pt 78 4))
|
||||
(line (pt 52 12)(pt 78 12))
|
||||
(line (pt 52 12)(pt 52 4))
|
||||
(line (pt 78 4)(pt 82 8))
|
||||
(line (pt 82 8)(pt 78 12))
|
||||
(line (pt 78 12)(pt 82 8))
|
||||
)
|
||||
)
|
||||
(symbol
|
||||
(rect 344 280 408 328)
|
||||
(text "AND2" (rect 1 0 25 10)(font "Arial" (font_size 6)))
|
||||
(text "inst" (rect 3 37 20 49)(font "Arial" ))
|
||||
(port
|
||||
(pt 0 16)
|
||||
(input)
|
||||
(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
|
||||
(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
|
||||
(line (pt 0 16)(pt 14 16))
|
||||
)
|
||||
(port
|
||||
(pt 0 32)
|
||||
(input)
|
||||
(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
|
||||
(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
|
||||
(line (pt 0 32)(pt 14 32))
|
||||
)
|
||||
(port
|
||||
(pt 64 24)
|
||||
(output)
|
||||
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
|
||||
(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
|
||||
(line (pt 42 24)(pt 64 24))
|
||||
)
|
||||
(drawing
|
||||
(line (pt 14 12)(pt 30 12))
|
||||
(line (pt 14 37)(pt 31 37))
|
||||
(line (pt 14 12)(pt 14 37))
|
||||
(arc (pt 31 37)(pt 30 12)(rect 18 12 43 37))
|
||||
)
|
||||
)
|
||||
(connector
|
||||
(text "hi" (rect 418 288 426 305)(font "Intel Clear" ))
|
||||
(pt 408 304)
|
||||
(pt 464 304)
|
||||
)
|
||||
(connector
|
||||
(text "hi" (rect 522 200 530 217)(font "Intel Clear" ))
|
||||
(pt 536 216)
|
||||
(pt 512 216)
|
||||
)
|
||||
Loading…
Reference in a new issue