ELEC40006-P1-CW/LUT.qip

set_global_assignment -name IP_TOOL_NAME "ROM: 2-PORT"
set_global_assignment -name IP_TOOL_VERSION "19.1"
set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}"
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "LUT.v"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "LUT.bsf"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "LUT_bb.v"]
Implemented multiplication fully. 16 bits and 8 bits multiplier circuits available 2020-05-29 16:47:44 +00:00			`set_global_assignment -name IP_TOOL_NAME "ROM: 2-PORT"`
			`set_global_assignment -name IP_TOOL_VERSION "19.1"`
			`set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}"`
			`set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "LUT.v"]`
			`set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "LUT.bsf"]`
Final State before Pipelining Debug Complete, data and instruction mifs + ram files. Test program checked 2020-06-09 21:45:20 +00:00			`set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "LUT_bb.v"]`