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Update lis3dh.py
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@ -52,11 +52,12 @@ class lis3dh:
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i2cBus.pec = True # enable smbus2 Packet Error Checking
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#First try; configure beginning from 0x20 with MSB = 1 to increment
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config1 = smbus2.i2c_msg.write(self.addr, [0xC0,0x1F,0x00,0x00,0x00,0x00,0x00,0x00])
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config0 = smbus2.i2c_msg.write(self.addr, [0x20,0x1F])
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config1 = smbus2.i2c_msg.write(self.addr, [0xC1,0x00,0x00,0x00,0x00,0x00,0x00])
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config2 = smbus2.i2c_msg.write(self.addr, [0xB2,0x00,0x00]) #Configure 0x32 with MSB = 1 to increment
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config3 = smbus2.i2c_msg.write(self.addr, [0x30,0x00]) #Configure 0x30
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config4 = smbus2.i2c_msg.write(self.addr, [0x24,0x00]) #Configure 0x24 again
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self.i2c.i2c_rdwr(config1, config2, config3, config4)
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self.i2c.i2c_rdwr(config0, config1, config2, config3, config4)
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check_CTRL_REG1 = smbus2.i2c_msg.write(self.addr, [0x20])
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ctrl_reg1 = smbus2.i2c_msg.read(self.addr, 1)
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self.i2c.i2c_rdwr(check_CTRL_REG1, ctrl_reg1)
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