diff --git a/lis3dh.py b/lis3dh.py
index 34da1b8..b610e71 100644
--- a/lis3dh.py
+++ b/lis3dh.py
@@ -52,11 +52,12 @@ class lis3dh:
         i2cBus.pec = True  # enable smbus2 Packet Error Checking
 
         #First try; configure beginning from 0x20 with MSB = 1 to increment
-        config1 = smbus2.i2c_msg.write(self.addr, [0xC0,0x1F,0x00,0x00,0x00,0x00,0x00,0x00])
+        config0 = smbus2.i2c_msg.write(self.addr, [0x20,0x1F])
+        config1 = smbus2.i2c_msg.write(self.addr, [0xC1,0x00,0x00,0x00,0x00,0x00,0x00])
         config2 = smbus2.i2c_msg.write(self.addr, [0xB2,0x00,0x00]) #Configure 0x32 with MSB = 1 to increment
         config3 = smbus2.i2c_msg.write(self.addr, [0x30,0x00]) #Configure 0x30
         config4 = smbus2.i2c_msg.write(self.addr, [0x24,0x00]) #Configure 0x24 again
-        self.i2c.i2c_rdwr(config1, config2, config3, config4)
+        self.i2c.i2c_rdwr(config0, config1, config2, config3, config4)
         check_CTRL_REG1 = smbus2.i2c_msg.write(self.addr, [0x20])
         ctrl_reg1 = smbus2.i2c_msg.read(self.addr, 1)
         self.i2c.i2c_rdwr(check_CTRL_REG1, ctrl_reg1)