mirror of
https://github.com/supleed2/ELEC60013-ES-CW1.git
synced 2024-12-22 21:45:48 +00:00
Update lis3dh.py
This commit is contained in:
parent
4314109f75
commit
062b180b1b
|
@ -52,11 +52,12 @@ class lis3dh:
|
|||
i2cBus.pec = True # enable smbus2 Packet Error Checking
|
||||
|
||||
#First try; configure beginning from 0x20 with MSB = 1 to increment
|
||||
config1 = smbus2.i2c_msg.write(self.addr, [0xC0,0x1F,0x00,0x00,0x00,0x00,0x00,0x00])
|
||||
config0 = smbus2.i2c_msg.write(self.addr, [0x20,0x1F])
|
||||
config1 = smbus2.i2c_msg.write(self.addr, [0xC1,0x00,0x00,0x00,0x00,0x00,0x00])
|
||||
config2 = smbus2.i2c_msg.write(self.addr, [0xB2,0x00,0x00]) #Configure 0x32 with MSB = 1 to increment
|
||||
config3 = smbus2.i2c_msg.write(self.addr, [0x30,0x00]) #Configure 0x30
|
||||
config4 = smbus2.i2c_msg.write(self.addr, [0x24,0x00]) #Configure 0x24 again
|
||||
self.i2c.i2c_rdwr(config1, config2, config3, config4)
|
||||
self.i2c.i2c_rdwr(config0, config1, config2, config3, config4)
|
||||
check_CTRL_REG1 = smbus2.i2c_msg.write(self.addr, [0x20])
|
||||
ctrl_reg1 = smbus2.i2c_msg.read(self.addr, 1)
|
||||
self.i2c.i2c_rdwr(check_CTRL_REG1, ctrl_reg1)
|
||||
|
|
Loading…
Reference in a new issue