supleed2/ELEC50010-IAC-CW
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68 commits 2 branches 0 tags 9.2 MiB
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6 commits

Author SHA1 Message Date
jl7719 943745a1e0 Tested all that can be tested for now 
Mult/Div, Branch/Jump Linking, J needs implementation before testing and store to be tested when switched to bus
 2020-12-13 14:40:16 +09:00
jl7719 14ad7fa0ce Update program counter 
Logic for instructions with linking not implemented. Can do basic branch delay slots. More left to do with return register
 2020-12-12 15:59:14 +09:00
jl7719 3594365a25 Create branch jl7719 
Can test for normal pc incrementing instr
 2020-12-11 19:45:13 +09:00
jc4419 9de2b59bbb Updated Harvard, ALU, PC, Control, and Regfile 2020-12-08 01:46:01 +04:00
Aadi Desai f2f8e05010 PC logic updated 
PC now has a delay into instr_mem to match MIPS32 spec and pc resets/initialises to MIPS32 reset vector
 2020-12-02 17:23:28 +00:00
jc4419 02f3f1cbba
Program Counter - Untested 2020-11-30 16:08:58 +04:00