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https://github.com/supleed2/ELEC50010-IAC-CW.git
synced 2024-11-10 01:35:49 +00:00
Rename vcd to differentiate between bus and harvard
This commit is contained in:
parent
86656b33ef
commit
6637ad813f
2
.gitignore
vendored
2
.gitignore
vendored
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@ -2,8 +2,6 @@ exec/*
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!exec/executable.txt
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!exec/executable.txt
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*.log.txt
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*.log.txt
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*.out.txt
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*.out.txt
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mips_cpu_harvard.vcd
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mips_cpu_bus.vcd
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.DS_Store
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.DS_Store
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inputs/.DS_Store
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inputs/.DS_Store
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*.stderr.txt
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*.stderr.txt
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@ -25,7 +25,7 @@ then
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-s mips_cpu_bus_tb \
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-s mips_cpu_bus_tb \
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-P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.instr.txt\" \
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-P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.instr.txt\" \
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-P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \
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-P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \
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-P mips_cpu_bus_tb.TESTCASE=\"inputs/${DIR}/${TESTCASE}.vcd\" \
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-P mips_cpu_bus_tb.TESTCASE=\"inputs/${DIR}/${TESTCASE}_bus.vcd\" \
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-o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v testbench/mips_cpu_bus_memory.v \
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-o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v testbench/mips_cpu_bus_memory.v \
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${SRC} 2> inputs/${DIR}/${TESTCASE}.stderr.txt
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${SRC} 2> inputs/${DIR}/${TESTCASE}.stderr.txt
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./exec/mips_cpu_bus_tb_${TESTCASE} &> ./inputs/${DIR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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./exec/mips_cpu_bus_tb_${TESTCASE} &> ./inputs/${DIR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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@ -47,7 +47,7 @@ else
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-s mips_cpu_bus_tb \
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-s mips_cpu_bus_tb \
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-P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.instr.txt\" \
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-P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.instr.txt\" \
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-P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \
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-P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \
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-P mips_cpu_bus_tb.TESTCASE=\"inputs/${INSTR}/${TESTCASE}.vcd\" \
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-P mips_cpu_bus_tb.TESTCASE=\"inputs/${INSTR}/${TESTCASE}_bus.vcd\" \
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-o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v testbench/mips_cpu_bus_memory.v \
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-o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v testbench/mips_cpu_bus_memory.v \
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${SRC} 2> inputs/${INSTR}/${TESTCASE}.stderr.txt
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${SRC} 2> inputs/${INSTR}/${TESTCASE}.stderr.txt
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./exec/mips_cpu_bus_tb_${TESTCASE} &> ./inputs/${INSTR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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./exec/mips_cpu_bus_tb_${TESTCASE} &> ./inputs/${INSTR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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@ -25,7 +25,7 @@ then
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-s mips_cpu_harvard_tb \
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-s mips_cpu_harvard_tb \
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-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.instr.txt\" \
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-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.instr.txt\" \
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-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \
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-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \
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-P mips_cpu_harvard_tb.TESTCASE=\"inputs/${DIR}/${TESTCASE}.vcd\" \
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-P mips_cpu_harvard_tb.TESTCASE=\"inputs/${DIR}/${TESTCASE}_harvard.vcd\" \
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-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v testbench/mips_cpu_harvard_memory.v\
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-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v testbench/mips_cpu_harvard_memory.v\
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${SRC} 2> inputs/${DIR}/${TESTCASE}.stderr.txt
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${SRC} 2> inputs/${DIR}/${TESTCASE}.stderr.txt
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./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${DIR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${DIR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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@ -47,7 +47,7 @@ else
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-s mips_cpu_harvard_tb \
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-s mips_cpu_harvard_tb \
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-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.instr.txt\" \
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-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.instr.txt\" \
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-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \
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-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \
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-P mips_cpu_harvard_tb.TESTCASE=\"inputs/${INSTR}/${TESTCASE}.vcd\" \
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-P mips_cpu_harvard_tb.TESTCASE=\"inputs/${INSTR}/${TESTCASE}_harvard.vcd\" \
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-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v testbench/mips_cpu_harvard_memory.v\
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-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v testbench/mips_cpu_harvard_memory.v\
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${SRC} 2> inputs/${INSTR}/${TESTCASE}.stderr.txt
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${SRC} 2> inputs/${INSTR}/${TESTCASE}.stderr.txt
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./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${INSTR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${INSTR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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