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Set harvard_tb clk_enable high, to allow other CPUs to run
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@ -8,6 +8,8 @@ module mips_cpu_harvard_tb;
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logic clk, clk_enable, reset, active, data_read, data_write;
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logic[31:0] register_v0, instr_address, instr_readdata, data_readdata, data_writedata, data_address;
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assign clk_enable = 1'b1;
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mips_cpu_harvard_memory #(INSTR_INIT_FILE, DATA_INIT_FILE) ramInst(
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.clk(clk),
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.data_address(data_address),
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