diff --git a/testbench/mips_cpu_harvard_tb.v b/testbench/mips_cpu_harvard_tb.v
index 33b8912..1faf899 100644
--- a/testbench/mips_cpu_harvard_tb.v
+++ b/testbench/mips_cpu_harvard_tb.v
@@ -8,6 +8,8 @@ module mips_cpu_harvard_tb;
     logic clk, clk_enable, reset, active, data_read, data_write;
     logic[31:0] register_v0, instr_address, instr_readdata, data_readdata, data_writedata, data_address;
 
+    assign clk_enable = 1'b1;
+
     mips_cpu_harvard_memory #(INSTR_INIT_FILE, DATA_INIT_FILE) ramInst(
         .clk(clk), 
         .data_address(data_address),