mirror of
https://github.com/supleed2/ELEC40006-P1-CW.git
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97 lines
3.3 KiB
Plaintext
97 lines
3.3 KiB
Plaintext
/*
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WARNING: Do NOT edit the input and output ports in this file in a text
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editor if you plan to continue editing the block that represents it in
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the Block Editor! File corruption is VERY likely to occur.
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*/
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/*
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Copyright (C) 2019 Intel Corporation. All rights reserved.
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Your use of Intel Corporation's design tools, logic functions
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and other software and tools, and any partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Intel Program License
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Subscription Agreement, the Intel Quartus Prime License Agreement,
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the Intel FPGA IP License Agreement, or other applicable license
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agreement, including, without limitation, that your use is for
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the sole purpose of programming logic devices manufactured by
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Intel and sold by Intel or its authorized distributors. Please
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refer to the applicable agreement for further details, at
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https://fpgasoftware.intel.com/eula.
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*/
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(header "symbol" (version "1.2"))
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(symbol
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(rect 0 0 256 120)
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(text "LUT" (rect 112 0 139 16)(font "Arial" (font_size 10)))
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(text "inst" (rect 8 104 25 116)(font "Arial" ))
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(port
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(pt 0 32)
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(input)
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(text "address_a[7..0]" (rect 0 0 89 14)(font "Arial" (font_size 8)))
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(text "address_a[7..0]" (rect 4 16 92 31)(font "Arial" (font_size 8)))
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(line (pt 0 32)(pt 112 32)(line_width 3))
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)
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(port
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(pt 0 64)
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(input)
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(text "address_b[7..0]" (rect 0 0 89 14)(font "Arial" (font_size 8)))
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(text "address_b[7..0]" (rect 4 48 92 63)(font "Arial" (font_size 8)))
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(line (pt 0 64)(pt 112 64)(line_width 3))
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)
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(port
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(pt 0 96)
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(input)
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(text "clock" (rect 0 0 29 14)(font "Arial" (font_size 8)))
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(text "clock" (rect 4 80 33 95)(font "Arial" (font_size 8)))
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(line (pt 0 96)(pt 104 96))
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)
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(port
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(pt 256 32)
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(output)
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(text "q_a[15..0]" (rect 0 0 56 14)(font "Arial" (font_size 8)))
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(text "q_a[15..0]" (rect 195 16 251 31)(font "Arial" (font_size 8)))
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(line (pt 256 32)(pt 168 32)(line_width 3))
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)
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(port
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(pt 256 64)
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|
(output)
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(text "q_b[15..0]" (rect 0 0 56 14)(font "Arial" (font_size 8)))
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|
(text "q_b[15..0]" (rect 195 48 251 63)(font "Arial" (font_size 8)))
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(line (pt 256 64)(pt 168 64)(line_width 3))
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)
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|
(drawing
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(text "256 Word(s)" (rect 134 -14 234 186)(font "Arial" )(vertical))
|
|
(text "RAM" (rect 148 -29 226 142)(font "Arial" )(vertical))
|
|
(text "Block Type: AUTO" (rect 40 106 174 226)(font "Arial" ))
|
|
(line (pt 128 24)(pt 168 24))
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|
(line (pt 168 24)(pt 168 80))
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|
(line (pt 168 80)(pt 128 80))
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|
(line (pt 128 80)(pt 128 24))
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|
(line (pt 112 27)(pt 120 27))
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|
(line (pt 120 27)(pt 120 39))
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(line (pt 120 39)(pt 112 39))
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(line (pt 112 39)(pt 112 27))
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|
(line (pt 112 34)(pt 114 36))
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|
(line (pt 114 36)(pt 112 38))
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|
(line (pt 104 36)(pt 112 36))
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|
(line (pt 120 32)(pt 128 32)(line_width 3))
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|
(line (pt 112 59)(pt 120 59))
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|
(line (pt 120 59)(pt 120 71))
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|
(line (pt 120 71)(pt 112 71))
|
|
(line (pt 112 71)(pt 112 59))
|
|
(line (pt 112 66)(pt 114 68))
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|
(line (pt 114 68)(pt 112 70))
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|
(line (pt 104 68)(pt 112 68))
|
|
(line (pt 120 64)(pt 128 64)(line_width 3))
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|
(line (pt 104 36)(pt 104 97))
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|
(line (pt 0 0)(pt 257 0))
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|
(line (pt 257 0)(pt 257 122))
|
|
(line (pt 0 122)(pt 257 122))
|
|
(line (pt 0 0)(pt 0 122))
|
|
(line (pt 0 0)(pt 0 0))
|
|
(line (pt 0 0)(pt 0 0))
|
|
(line (pt 0 0)(pt 0 0))
|
|
(line (pt 0 0)(pt 0 0))
|
|
)
|
|
)
|