ELEC70056-HSV-CW2/rtl/AHB_BRAM
2022-11-07 12:58:43 +00:00
..
AHB2BRAM.sv Switch all Verilog files to SystemVerilog file endings 2022-11-07 12:58:43 +00:00
code.hex Initial Commit 2022-11-07 12:41:05 +00:00
readme.txt Initial Commit 2022-11-07 12:41:05 +00:00

Note that when synthesizing, "code.hex" and "AHB2BRAM.v" have to be placed at the same directory in your project.