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https://github.com/supleed2/ELEC70056-HSV-CW2.git
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Add parity generation and checking to AHBGPIO.sv
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@ -3,7 +3,7 @@
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// //
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//Copyright (c) 2012, ARM All rights reserved. //
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// //
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//THIS END USER LICENCE AGREEMENT (“LICENCE”) IS A LEGAL AGREEMENT BETWEEN //
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//THIS END USER LICENCE AGREEMENT (<EFBFBD>LICENCE<EFBFBD>) IS A LEGAL AGREEMENT BETWEEN //
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//YOU AND ARM LIMITED ("ARM") FOR THE USE OF THE SOFTWARE EXAMPLE ACCOMPANYING //
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//THIS LICENCE. ARM IS ONLY WILLING TO LICENSE THE SOFTWARE EXAMPLE TO YOU ON //
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//CONDITION THAT YOU ACCEPT ALL OF THE TERMS IN THIS LICENCE. BY INSTALLING OR //
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@ -35,31 +35,32 @@
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//////////////////////////////////////////////////////////////////////////////////
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module AHBGPIO(
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input wire HCLK,
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input wire HRESETn,
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input wire [31:0] HADDR,
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input wire [1:0] HTRANS,
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input wire [31:0] HWDATA,
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input wire HWRITE,
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input wire HSEL,
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input wire HREADY,
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input wire [15:0] GPIOIN,
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module AHBGPIO
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( input wire HCLK
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, input wire HRESETn
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, input wire [31:0] HADDR
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, input wire [1:0] HTRANS
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, input wire [31:0] HWDATA
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, input wire HWRITE
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, input wire HSEL
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, input wire HREADY
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, input wire [16:0] GPIOIN
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, input wire PARITYSEL
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, input wire INJECT_FAULT
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//Output
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output wire HREADYOUT,
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output wire [31:0] HRDATA,
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output wire [15:0] GPIOOUT
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);
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, output wire HREADYOUT
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, output wire [31:0] HRDATA
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, output wire [16:0] GPIOOUT
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, output wire PARITYERR
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);
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localparam [7:0] gpio_data_addr = 8'h00;
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localparam [7:0] gpio_dir_addr = 8'h04;
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reg [15:0] gpio_dataout;
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reg gpio_parityout;
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reg [15:0] gpio_datain;
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reg gpio_parityerr;
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reg [15:0] gpio_dir;
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reg [15:0] gpio_data_next;
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reg [31:0] last_HADDR;
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@ -73,52 +74,42 @@ module AHBGPIO(
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// Set Registers from address phase
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always @(posedge HCLK)
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begin
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if(HREADY)
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begin
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if(HREADY) begin
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last_HADDR <= HADDR;
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last_HTRANS <= HTRANS;
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last_HWRITE <= HWRITE;
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last_HSEL <= HSEL;
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end
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end
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// Update in/out switch
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always @(posedge HCLK, negedge HRESETn)
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begin
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if(!HRESETn)
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begin
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gpio_dir <= 16'h0000;
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end
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else if ((last_HADDR[7:0] == gpio_dir_addr) & last_HSEL & last_HWRITE & last_HTRANS[1])
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gpio_dir <= HWDATA[15:0];
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end
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// Update output value
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always @(posedge HCLK, negedge HRESETn)
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begin
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if(!HRESETn)
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begin
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gpio_dataout <= 16'h0000;
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end
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else if ((gpio_dir == 16'h0001) & (last_HADDR[7:0] == gpio_data_addr) & last_HSEL & last_HWRITE & last_HTRANS[1])
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{gpio_parityout, gpio_dataout} <= 17'd0;
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else if ((gpio_dir == 16'h0001) & (last_HADDR[7:0] == gpio_data_addr) & last_HSEL & last_HWRITE & last_HTRANS[1]) begin
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gpio_dataout <= HWDATA[15:0];
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gpio_parityout <= ~^{HWDATA[15:0],PARITYSEL,INJECT_FAULT};
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end
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// Update input value
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always @(posedge HCLK, negedge HRESETn)
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begin
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if(!HRESETn)
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begin
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gpio_datain <= 16'h0000;
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else if (gpio_dir == 16'h0000) begin
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gpio_datain <= GPIOIN[15:0];
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gpio_parityerr <= ~^{GPIOIN,PARITYSEL,INJECT_FAULT};
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end
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else if (gpio_dir == 16'h0000)
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gpio_datain <= GPIOIN;
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else if (gpio_dir == 16'h0001)
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gpio_datain <= GPIOOUT;
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end
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assign HRDATA[15:0] = gpio_datain;
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assign GPIOOUT = gpio_dataout;
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assign GPIOOUT = {gpio_parityout, gpio_dataout};
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assign PARITYERR = gpio_parityerr;
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endmodule
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