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https://github.com/supleed2/ELEC60011-DSD-CW.git
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93 lines
5 KiB
Verilog
93 lines
5 KiB
Verilog
// megafunction wizard: %FP_FUNCTIONS Intel FPGA IP v20.1%
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// GENERATION: XML
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// fix_to_fp.v
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// Generated using ACDS version 20.1 720
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`timescale 1 ps / 1 ps
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module fix_to_fp (
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input wire clk, // clk.clk
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input wire areset, // areset.reset
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input wire [0:0] en, // en.en
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input wire [31:0] a, // a.a
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output wire [31:0] q // q.q
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);
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fix_to_fp_0002 fix_to_fp_inst (
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.clk (clk), // clk.clk
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.areset (areset), // areset.reset
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.en (en), // en.en
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.a (a), // a.a
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.q (q) // q.q
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);
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endmodule
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// Retrieval info: <?xml version="1.0"?>
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//<!--
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// Generated by Altera MegaWizard Launcher Utility version 1.0
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// ************************************************************
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// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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// ************************************************************
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// Copyright (C) 1991-2022 Altera Corporation
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// Any megafunction design, and related net list (encrypted or decrypted),
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// support information, device programming or simulation file, and any other
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// associated documentation or information provided by Altera or a partner
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// under Altera's Megafunction Partnership Program may be used only to
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// program PLD devices (but not masked PLD devices) from Altera. Any other
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// use of such megafunction design, net list, support information, device
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// programming or simulation file, or any other related documentation or
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// information is prohibited for any other purpose, including, but not
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// limited to modification, reverse engineering, de-compiling, or use with
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// any other silicon devices, unless such use is explicitly licensed under
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// a separate agreement with Altera or a megafunction partner. Title to
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// the intellectual property, including patents, copyrights, trademarks,
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// trade secrets, or maskworks, embodied in any such megafunction design,
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// net list, support information, device programming or simulation file, or
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// any other related documentation or information provided by Altera or a
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// megafunction partner, remains with Altera, the megafunction partner, or
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// their respective licensors. No other licenses, including any licenses
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// needed under any third party's intellectual property, are provided herein.
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//-->
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// Retrieval info: <instance entity-name="altera_fp_functions" version="20.1" >
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// Retrieval info: <generic name="FUNCTION_FAMILY" value="CONVERT" />
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// Retrieval info: <generic name="ARITH_function" value="ADD" />
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// Retrieval info: <generic name="CONVERT_function" value="FXP_FP" />
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// Retrieval info: <generic name="ALL_function" value="ADD" />
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// Retrieval info: <generic name="EXP_LOG_function" value="EXPE" />
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// Retrieval info: <generic name="TRIG_function" value="SIN" />
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// Retrieval info: <generic name="COMPARE_function" value="MIN" />
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// Retrieval info: <generic name="ROOTS_function" value="SQRT" />
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// Retrieval info: <generic name="fp_format" value="single" />
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// Retrieval info: <generic name="fp_exp" value="8" />
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// Retrieval info: <generic name="fp_man" value="23" />
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// Retrieval info: <generic name="exponent_width" value="23" />
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// Retrieval info: <generic name="frequency_target" value="50" />
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// Retrieval info: <generic name="latency_target" value="2" />
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// Retrieval info: <generic name="performance_goal" value="combined" />
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// Retrieval info: <generic name="rounding_mode" value="nearest with tie breaking away from zero" />
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// Retrieval info: <generic name="faithful_rounding" value="false" />
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// Retrieval info: <generic name="gen_enable" value="true" />
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// Retrieval info: <generic name="divide_type" value="0" />
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// Retrieval info: <generic name="select_signal_enable" value="false" />
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// Retrieval info: <generic name="scale_by_pi" value="false" />
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// Retrieval info: <generic name="number_of_inputs" value="2" />
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// Retrieval info: <generic name="trig_no_range_reduction" value="false" />
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// Retrieval info: <generic name="report_resources_to_xml" value="false" />
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// Retrieval info: <generic name="fxpt_width" value="32" />
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// Retrieval info: <generic name="fxpt_fraction" value="30" />
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// Retrieval info: <generic name="fxpt_sign" value="1" />
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// Retrieval info: <generic name="fp_out_format" value="single" />
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// Retrieval info: <generic name="fp_out_exp" value="8" />
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// Retrieval info: <generic name="fp_out_man" value="23" />
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// Retrieval info: <generic name="fp_in_format" value="single" />
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// Retrieval info: <generic name="fp_in_exp" value="8" />
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// Retrieval info: <generic name="fp_in_man" value="23" />
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// Retrieval info: <generic name="enable_hard_fp" value="true" />
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// Retrieval info: <generic name="manual_dsp_planning" value="true" />
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// Retrieval info: <generic name="forceRegisters" value="1111" />
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// Retrieval info: <generic name="selected_device_family" value="Cyclone V" />
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// Retrieval info: <generic name="selected_device_speedgrade" value="7" />
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// Retrieval info: </instance>
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// IPFS_FILES : fix_to_fp.vo
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// RELATED_FILES: fix_to_fp.v, dspba_library_package.vhd, dspba_library.vhd, fix_to_fp_0002.vhd
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