mirror of
https://github.com/supleed2/ELEC60011-DSD-CW.git
synced 2024-09-19 20:36:17 +00:00
112 lines
4 KiB
Verilog
112 lines
4 KiB
Verilog
module Cordic_Impl1(
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input clk,
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input clk_en,
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input start,
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input reset,
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input [31:0] dataa,
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output [31:0] result,
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output [31:0] z_debug,
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output [31:0] angle_debug,
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output [4:0] iter_debug,
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output done,
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output [31:0] y_debug
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);
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reg [31:0] x_out,y_out,z_out;
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reg [31:0] x_next,y_next,z_next;
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reg [4:0] iter,iter_next;
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wire [31:0] angle_lut [31:0];
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reg working, working_next;
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assign z_debug = z_out;
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assign result = x_out;
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assign angle_debug = angle_lut[iter];
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assign y_debug = y_out;
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assign iter_debug = iter;
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assign done = (iter==5'b11111);
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always@(posedge clk or posedge reset) begin
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if(reset) begin
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x_out <= 0;
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y_out <= 0;
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z_out <= 0;
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iter <= 0;
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working <= 0;
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end else begin
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x_out <= x_next;
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y_out <= y_next;
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z_out <= z_next;
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if(done) begin
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working <= 0;
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end else begin
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working <= working_next;
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end
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iter <= iter_next;
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end
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end
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always @(*) begin
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if(working) begin
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if(~z_out[31]) begin
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x_next <= x_out - ({{32{y_out[31]}}, y_out} >> iter);
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y_next <= y_out + ({{32{x_out[31]}}, x_out} >> iter);
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z_next <= z_out - angle_lut[iter];
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end
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else begin
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x_next <= x_out + ({{32{y_out[31]}}, y_out} >> iter);
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y_next <= y_out - ({{32{x_out[31]}}, x_out} >> iter);
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z_next <= z_out + angle_lut[iter];
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end
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iter_next <= iter+1;
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end
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else if(start) begin
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x_next <= 32'b00100110110111010011101101101010; //Gain factor
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y_next <= 0;
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z_next <= dataa;
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working_next <= 1;
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iter_next <= 0;
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end else begin
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x_next <= 0;
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y_next <= 0;
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z_next <= 0;
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working_next <= 0;
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iter_next <= 0;
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end
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end
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assign angle_lut[0] = 32'b00110010010000111111011010101000;
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assign angle_lut[1] = 32'b00011101101011000110011100000101;
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assign angle_lut[2] = 32'b00001111101011011011101011111100;
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assign angle_lut[3] = 32'b00000111111101010110111010100110;
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assign angle_lut[4] = 32'b00000011111111101010101101110110;
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assign angle_lut[5] = 32'b00000001111111111101010101011011;
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assign angle_lut[6] = 32'b00000000111111111111101010101010;
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assign angle_lut[7] = 32'b00000000011111111111111101010101;
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assign angle_lut[8] = 32'b00000000001111111111111111101010;
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assign angle_lut[9] = 32'b00000000000111111111111111111101;
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assign angle_lut[10] = 32'b00000000000011111111111111111111;
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assign angle_lut[11] = 32'b00000000000001111111111111111111;
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assign angle_lut[12] = 32'b00000000000000111111111111111111;
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assign angle_lut[13] = 32'b00000000000000011111111111111111;
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assign angle_lut[14] = 32'b00000000000000001111111111111111;
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assign angle_lut[15] = 32'b00000000000000000111111111111111;
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assign angle_lut[16] = 32'b00000000000000000011111111111111;
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assign angle_lut[17] = 32'b00000000000000000010000000000000;
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assign angle_lut[18] = 32'b00000000000000000000111111111111;
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assign angle_lut[19] = 32'b00000000000000000000100000000000;
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assign angle_lut[20] = 32'b00000000000000000000001111111111;
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assign angle_lut[21] = 32'b00000000000000000000000111111111;
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assign angle_lut[22] = 32'b00000000000000000000000100000000;
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assign angle_lut[23] = 32'b00000000000000000000000001111111;
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assign angle_lut[24] = 32'b00000000000000000000000001000000;
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assign angle_lut[25] = 32'b00000000000000000000000000011111;
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assign angle_lut[26] = 32'b00000000000000000000000000001111;
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assign angle_lut[27] = 32'b00000000000000000000000000001000;
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assign angle_lut[28] = 32'b00000000000000000000000000000011;
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assign angle_lut[29] = 32'b00000000000000000000000000000010;
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assign angle_lut[30] = 32'b00000000000000000000000000000000;
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assign angle_lut[31] = 32'b00000000000000000000000000000000;
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endmodule |