mirror of
https://github.com/supleed2/ELEC50010-IAC-CW.git
synced 2024-11-10 01:35:49 +00:00
64 lines
2 KiB
Bash
64 lines
2 KiB
Bash
#!/bin/bash
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# should not create any files in the rtl dir
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# but auxiliary files / dirs can be utilised
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# Source File & Source Directory Parsing
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SRC_DIR=${1?Error: no source directory given in argument}; # e.g. ./rtl
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SRC=$(ls ${SRC_DIR} | grep -E "harvard|memory|alu|regfile|pc|control");
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SRC_TEMP="";
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for src in ${SRC}
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do
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SRC_TEMP+=${SRC_DIR}/${src}" ";
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done
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SRC=${SRC_TEMP}
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echo ${SRC}
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# Instruction Argument
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INSTR=${2:-"No instruction specified: running all testcases"}; # e.g. addiu
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echo ${INSTR};
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# Start Testing
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if [[ ${INSTR} == "No instruction specified: running all testcases" ]];
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then
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# All Testcase Files
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TESTCASES=$(ls ./inputs | grep ".hex.txt");
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echo ${TESTCASES}
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for TESTCASE in ${TESTCASES}
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do
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# Run Each Testcase File
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echo ${TESTCASE}
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#iverilog -g 2012 \
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# -s mips_cpu_harvard_tb \
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# -P mips_cpu_harvard_tb.RAM_INIT_FILE=\"inputs/"${TESTCASE}\" \
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# -o program/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \
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# ${SRC}
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done
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else
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echo ${INSTR};
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# Run Testcase File Of Specified Instruction
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# Windows Iverilog with WSL
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#/mnt/c/Windows/System32/cmd.exe /C iverilog -g2012 \
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# -s mips_cpu_harvard_tb \
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# -P mips_cpu_harvard_tb.RAM_INIT_FILE=\"inputs/${INSTR}.txt\" \
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# -o program/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \
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# ${SRC}
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# Linux Iverilog
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iverilog -g2012 \
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-s mips_cpu_harvard_tb \
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-P mips_cpu_harvard_tb.RAM_INIT_FILE=\"inputs/${INSTR}.txt\" \
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-o program/mips_cpu_harvard_tb_${INSTR} testbench/mips_cpu_harvard_tb.v \
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${SRC}
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fi
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#/mnt/c/Windows/System32/cmd.exe /C \ # need this to run verilog on windows
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#iverilog -g 2012 \
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# -s mips_cpu_harvard_tb \
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# -P mips_cpu_harvard_tb.RAM_INIT_FILE=\"inputs/addiu.hex.txt\" \
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# -o program/mips_cpu_harvard_tb testbench/mips_cpu_harvard_tb.v test/mips_cpu_harvard.v \
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# test/mips_cpu_control.v test/mips_cpu_alu.v test/mips_cpu_memory.v test/mips_cpu_regfile.v test/mips_cpu_pc.v
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