12 commits

Author	SHA1	Message	Date
Aadi Desai	088b2bae21	Replace .v with .sv in scripts to match	2020-12-19 08:43:28 -08:00
jl7719	a31d41512b	Rename all instruction mem init files to .instr.txt	2020-12-18 12:42:58 +00:00
jl7719	dd4f6346be	Add exec folder and executable.txt back for the test to work	2020-12-18 10:51:30 +00:00
jl7719	a4a28db189	Add stderr.txt files and diff.txt files for debugging	2020-12-18 10:41:01 +00:00
Aadi Desai	e89087c127	Bus Memory typo in bus script	2020-12-17 06:34:42 -08:00
Aadi Desai	2eccc5148e	Move bus memory from rtl to testbench folder	2020-12-17 13:58:07 +00:00
Aadi Desai	33bb4c7538	Constant selects not working in always_ff in current iverilog	2020-12-16 14:21:26 -08:00
Aadi Desai	da0c9aba01	Fix {} for bit duplication, remove module name from endmodule	2020-12-16 13:38:09 -08:00
Aadi Desai	744aee097f	Modify bus tb to compile bus version instead	2020-12-16 20:15:08 +00:00
jl7719	4be3149300	Update test_mips_cpu_bus.sh ... Needs checking for source file for bus version	2020-12-16 15:58:03 +00:00
ppuk	2d935d9211	linux supported	2020-12-14 15:38:05 +00:00
jl7719	e6e4f17afe	Add initial coursework deliverables	2020-11-24 14:20:29 +09:00