supleed2/ELEC50010-IAC-CW
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188 commits 2 branches 0 tags 9.2 MiB
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66 commits

Author SHA1 Message Date
jl7719 0d731c74b2 Add testcases for or and ori 2020-12-19 13:13:56 +00:00
theexecutor13 7850cb65d6 fixing testcase errors 2020-12-19 11:16:39 +00:00
yhp19 3836be459f Merge branch 'main' of https://github.com/supleed2/AM04_CPU into main 2020-12-19 19:04:39 +08:00
yhp19 cbc305b139 load instr testcase 2020-12-19 19:04:29 +08:00
jl7719 cecf5537b0 Fix some errors 
j-2.ref.txt fixed and removed square bracket from regfile
 2020-12-19 10:41:05 +00:00
yhp19 6797fc5a32 added some jump testcases 2020-12-19 15:24:34 +08:00
theexecutor13 3110fb19ea fixed branch instr testcase 2020-12-19 06:32:51 +00:00
yhp19 ce776e28ce added more branch instructions testcases 2020-12-19 14:15:44 +08:00
jl7719 9aa405120f Fix divu testcases and add divu-5 testcase 
Updated the edgecase ref file
 2020-12-19 05:37:54 +00:00
ibzmo 044e972176 sll, sllv & store and set instructions still to go 2020-12-18 23:13:47 +00:00
theexecutor13 ea21975708 fixing testcases 2020-12-18 15:04:46 +00:00
yhp19 9e7a5caf82 weird cases added 2020-12-18 23:10:15 +08:00
yhp19 3e5729e642 beq testcases 2020-12-18 22:08:55 +08:00
jl7719 a31d41512b Rename all instruction mem init files to .instr.txt 2020-12-18 12:42:58 +00:00
theexecutor13 bcc05cd061 Merge branch 'main' of https://github.com/supleed2/AM04_CPU into main 2020-12-18 10:07:54 +00:00
theexecutor13 3f8393a404 add some testcases 2020-12-18 10:07:42 +00:00
jl7719 f3779e1cc3 Fix div-5 testcase minor error 2020-12-18 09:24:58 +00:00
jl7719 2a7b9c2c49 Merge branch 'main' of https://github.com/supleed2/AM04_CPU into main 2020-12-18 09:22:27 +00:00
jl7719 47a452cd6d Fix div input testcases 3,4,5 2020-12-18 09:20:00 +00:00
Ibrahim 579dc5e008 fixed one test case 2020-12-18 09:10:46 +00:00
Ibrahim 48e0cdfbb6 added edge cases these don't pass - please check 2020-12-18 08:48:51 +00:00
Aadi Desai 1be11d6c19 Add second store halfword testcase 
Checks that only half the word is written using load word after store halfword
 2020-12-17 10:00:18 -08:00
Aadi Desai c8344184b2 Fix sb, sh testcases 
Tried to write to instr mem + typo
 2020-12-17 09:41:55 -08:00
theexecutor13 6c400f3567 uploading log.txt weirdness testcase 2020-12-17 14:31:33 +00:00
theexecutor13 7fcc2486cb cleanup 2020-12-17 13:37:00 +00:00
theexecutor13 ab13c84ef5 testing branch delay slot 2020-12-17 12:03:30 +00:00
jl7719 697b6e0a9e Update some testcases for branch delay slots 2020-12-16 17:13:39 +00:00
Aadi Desai 252f630162 Cleanup 2020-12-16 15:40:21 +00:00
Aadi Desai 1a413d9686 Merge branch 'main' into jl7719 2020-12-16 15:40:07 +00:00
jl7719 ebe33ce56a Passes all tests 2020-12-16 15:29:04 +00:00
Jeevaha Coelho 7185f7e7e6 Fixed BGEZAL 2020-12-16 07:00:46 -08:00
Jeevaha Coelho 2673e23137 FIxed PC! 2020-12-16 05:21:57 -08:00
jl7719 ad68ab0974 Debugging and debugging 
PC, Jump instr, branches
 2020-12-16 12:29:22 +00:00
jl7719 0891f7e653 Debug mult/div to work 
it works now
 2020-12-16 08:38:46 +00:00
yhp19 07d32e9baf fixed input file plz document ur change in reference.txt 2020-12-16 12:27:48 +08:00
yhp19 cc5d2bbeab changes to input files 2020-12-16 00:57:46 +08:00
jl7719 b812399844 Fix to allow multiple testcases for each instruction 2020-12-15 15:06:04 +00:00
Ibrahim adb4b5d6fd created seperate division testcases, fived srlv, sllu, srav & added sh (forgot this instruction previously) 2020-12-15 13:42:09 +00:00
Ibrahim 26ccff5057 Merge branch 'jl7719' of https://github.com/supleed2/AM04_CPU into main 2020-12-15 13:38:04 +00:00
ppuk 2030a186cc changed bltzal input txt 2020-12-15 08:56:23 +00:00
jl7719 63abcf671a Tidy up and change bash to ./ 2020-12-14 17:49:30 +00:00
theexecutor13 6519be9a9e
Update reference.txt 2020-12-14 23:59:08 +08:00
theexecutor13 d72676c30c
Update bltzal.txt 2020-12-14 23:58:08 +08:00
jl7719 f882d1e361 Test different inputs for lb, lbu 
it works
 2020-12-13 15:16:53 +09:00
jl7719 943745a1e0 Tested all that can be tested for now 
Mult/Div, Branch/Jump Linking, J needs implementation before testing and store to be tested when switched to bus
 2020-12-13 14:40:16 +09:00
jl7719 c31344c55f More testcases, testing, debugging 2020-12-13 01:25:36 +09:00
yhp19 276f7f8216 Added ref files for j and load instructions 2020-12-12 23:59:04 +08:00
yhp19 ab27fcaed3 Reference txt now in reference folders 2020-12-12 23:46:42 +08:00
yhp19 69cd711cfc Added load instruction txt and data.txt 2020-12-12 23:39:00 +08:00
jl7719 14ad7fa0ce Update program counter 
Logic for instructions with linking not implemented. Can do basic branch delay slots. More left to do with return register
 2020-12-12 15:59:14 +09:00