supleed2/ELEC50010-IAC-CW
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201 commits 2 branches 0 tags 9.2 MiB
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6 commits

Author SHA1 Message Date
jl7719 0d731c74b2 Add testcases for or and ori 2020-12-19 13:13:56 +00:00
jl7719 a31d41512b Rename all instruction mem init files to .instr.txt 2020-12-18 12:42:58 +00:00
theexecutor13 ab13c84ef5 testing branch delay slot 2020-12-17 12:03:30 +00:00
jl7719 0891f7e653 Debug mult/div to work 
it works now
 2020-12-16 08:38:46 +00:00
yhp19 cc5d2bbeab changes to input files 2020-12-16 00:57:46 +08:00
jl7719 b812399844 Fix to allow multiple testcases for each instruction 2020-12-15 15:06:04 +00:00