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Update hardvard.v to match ALU

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This commit is contained in:
Aadi Desai 2020-12-02 13:27:37 +00:00
parent c4cae70ffc
commit bd9ae64dc2
2 changed files with 14 additions and 11 deletions
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11
rtl/mips_cpu_alu.v
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@ -8,15 +8,16 @@ module mips_cpu_alu(
output logic ALUZero, //Is the output of the ALU 0? - used to check result output logic ALUZero, //Is the output of the ALU 0? - used to check result
output logic[31:0] ALUOut, // The ouput of the ALU output logic[31:0] ALUOut, // The ouput of the ALU
input logic[15:0] immediate;
input logic[4:0] shamt
);
input [15:0] immediate; input [15:0] immediate;
reg [31:0] SignExtend, ZeroExtend; reg [31:0] SignExtend, ZeroExtend;
input logic[10:6] shamt = instr_readdata[10:6]
);
// Instructions commented out have been accounted for // Instructions commented out have been accounted for
/* Using an enum to define constants */ /* Using an enum to define constants */

14
rtl/mips_cpu_harvard.v
View file

@ -41,7 +41,7 @@ logic[4:0] rs = instr_readdata[25:21];
logic[4:0] rt = instr_readdata[20:16]; logic[4:0] rt = instr_readdata[20:16];
logic[4:0] rd = RegDst==2'b10 ? 5'b11111 : RegDst==2'b01 ? instr_readdata[15:11] : instr_readdata[20:16]; logic[4:0] rd = RegDst==2'b10 ? 5'b11111 : RegDst==2'b01 ? instr_readdata[15:11] : instr_readdata[20:16];
logic[15:0] immediate = instr_readdata[15:0]; logic[15:0] immediate = instr_readdata[15:0];
logic[10:6] shamt = instr_readdata[10:6]; // Shamt needed for the sll instruction logic[4:0] shamt = instr_readdata[10:6]; // Shamt needed for the sll instruction
//ALU Data //ALU Data
@ -94,10 +94,12 @@ alucontrol alucontrol(
); );
alu alu( alu alu(
.aluflags(ALUFlags), //selects the operation carried out by the ALU .ALUFlags(ALUFlags), //selects the operation carried out by the ALU
.in1(alu_in1), //operand 1 .A(alu_in1), //operand 1
.in2(alu_in2), //operand 2 .B(alu_in2), //operand 2
.zero(ALUZero), //is the result zero, used for checks .ALUzero(ALUZero), //is the result zero, used for checks
.out(ALUOut) //output/result of operation .ALUOut(ALUOut), //output/result of operation
.immediate(immediate),
.shamt(shamt)
); );
endmodule : mips_cpu_harvard endmodule : mips_cpu_harvard