From bd9ae64dc21c58366cd1a7ba09eb6d981d782dab Mon Sep 17 00:00:00 2001
From: Aadi Desai <21363892+supleed2@users.noreply.github.com>
Date: Wed, 2 Dec 2020 13:27:37 +0000
Subject: [PATCH] Update hardvard.v to match ALU

---
 rtl/mips_cpu_alu.v     | 11 ++++++-----
 rtl/mips_cpu_harvard.v | 14 ++++++++------
 2 files changed, 14 insertions(+), 11 deletions(-)

diff --git a/rtl/mips_cpu_alu.v b/rtl/mips_cpu_alu.v
index 61b8357..a8aa579 100644
--- a/rtl/mips_cpu_alu.v
+++ b/rtl/mips_cpu_alu.v
@@ -8,15 +8,16 @@ module mips_cpu_alu(
   output logic ALUZero, //Is the output of the ALU 0? - used to check result
 
   output logic[31:0] ALUOut, // The ouput of the ALU 
+  
+  input logic[15:0] immediate; 
+
+  input logic[4:0] shamt
+
+);
 
   input [15:0] immediate;
 
   reg [31:0] SignExtend, ZeroExtend;
-
-  input logic[10:6] shamt = instr_readdata[10:6]
-
-);
-
 // Instructions commented out have been accounted for 
 
     /* Using an enum to define constants */
diff --git a/rtl/mips_cpu_harvard.v b/rtl/mips_cpu_harvard.v
index ba36e1e..713b70d 100644
--- a/rtl/mips_cpu_harvard.v
+++ b/rtl/mips_cpu_harvard.v
@@ -41,7 +41,7 @@ logic[4:0] rs = instr_readdata[25:21];
 logic[4:0] rt = instr_readdata[20:16];
 logic[4:0] rd = RegDst==2'b10 ? 5'b11111 : RegDst==2'b01 ? instr_readdata[15:11] : instr_readdata[20:16];
 logic[15:0] immediate = instr_readdata[15:0];
-logic[10:6] shamt = instr_readdata[10:6]; // Shamt needed for the sll instruction
+logic[4:0] shamt = instr_readdata[10:6]; // Shamt needed for the sll instruction
 
 
 //ALU Data
@@ -94,10 +94,12 @@ alucontrol alucontrol(
 );
 
 alu alu(
-.aluflags(ALUFlags), //selects the operation carried out by the ALU
-.in1(alu_in1), //operand 1
-.in2(alu_in2), //operand 2
-.zero(ALUZero), //is the result zero, used for checks
-.out(ALUOut) //output/result of operation
+.ALUFlags(ALUFlags), //selects the operation carried out by the ALU
+.A(alu_in1), //operand 1
+.B(alu_in2), //operand 2
+.ALUzero(ALUZero), //is the result zero, used for checks
+.ALUOut(ALUOut), //output/result of operation
+.immediate(immediate),
+.shamt(shamt)
 );
 endmodule : mips_cpu_harvard