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Fix program counter taking two cycles for each instr
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@ -56,7 +56,7 @@ module mips_cpu_memory(
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//Synchronous write path
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always_ff @(posedge clk) begin
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$display("Instruction Read: %h", instr_readdata);
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//$display("Instruction Read: %h", instr_readdata);
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//$display("RAM : INFO : data_read=%h, data_address = %h, mem=%h", data_read, data_address, memory[data_address]);
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if (data_write) begin //cannot read and write to memory in the same cycle
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if (instr_address != data_address) begin //cannot modify the instruction being read
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@ -26,25 +26,29 @@ always_ff @(posedge clk) begin
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active <= 0;
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end
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pc_out <= pc_next;
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case(pc_ctrl)
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default: begin
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pc_next <= pc_out + 32'd4;
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end
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end
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always_comb begin
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case(pc_ctrl)
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2'd1: begin // Branch
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pc_next <= pc_out + 32'd4 + {{14{instr[15]}},instr[15:0],2'b00};
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pc_next = pc_out + 32'd4 + {{14{instr[15]}},instr[15:0],2'b00};
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end
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2'd2: begin // Jump
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pc_next <= {pc_lit_next[31:28], instr[25:0], 2'b00};
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pc_next = {pc_lit_next[31:28], instr[25:0], 2'b00};
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$display("JUMPING");
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$display("pc_lit_next: %h", pc_lit_next[31:28]);
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$display("instr: %b", instr[25:0]);
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$display("%h",pc_next);
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end
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2'd3: begin // Jump using Register
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pc_next <= reg_readdata;
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pc_next = reg_readdata;
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end
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default: begin
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pc_next = pc_out + 32'd4;
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end
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endcase
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end
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end
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endmodule // pc
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