Update memory

No longer need the massive memory
This commit is contained in:
jl7719 2020-12-10 19:14:16 +09:00
parent c93473a54d
commit 84adff2ed1

View file

@ -1,19 +1,3 @@
/*
Memory for Harvard Interface
- RAM Size: 32 x 2^32 = 32 x 4294967296
- Instructions in binaries or hex -> RAM_INIT_FILE
- combinatorial read/fetch of instruction via instr_ port
- combinatorial read and single cycle write of data via data_ port
Instantiation of Memory Module
- mips_cpu_memory #(RAM_INIT_FILE) ramInst(clk, data_address, data_write, data_read, data_writedata, data_readdata, instr_address, instr_readdata);
Special Memory Locations
- Whether a particular address maps to RAM, ROM, or something else is entirely down to the top-level circuit outside your CPU.
- special memory locations: 0x00000000 (CPU halt), 0xBFC00000 (start execution after reset)
- PC should be 0xBFC00000 at the start and 0x00000000 at the end
*/
module mips_cpu_memory( module mips_cpu_memory(
input logic clk, input logic clk,
@ -31,29 +15,32 @@ module mips_cpu_memory(
); );
parameter RAM_INIT_FILE = ""; parameter RAM_INIT_FILE = "";
reg [31:0] memory [0:7]; // 2^30 set as 8 for now for small testcases reg [31:0] data_memory [0:63];
reg [31:0] instr_memory [0:63];
initial begin initial begin
integer i; integer i;
//Initialise to zero by default //Initialise to zero by default
for (i=0; i<8; i++) begin for (i=0; i<$size(data_memory); i++) begin
memory[i]=0; data_memory[i] = 0;
end
for (i=0; i<$size(instr_memory); i++) begin
instr_memory[i] = 0;
end end
//Load contents from file if specified //Load contents from file if specified
if (RAM_INIT_FILE != "") begin if (RAM_INIT_FILE != "") begin
$display("RAM: Loading RAM contents from %s", RAM_INIT_FILE); $display("RAM: Loading RAM contents from %s", RAM_INIT_FILE);
$readmemh(RAM_INIT_FILE, memory, 32'h4); //32'hBFC00000 equivalent for small memory as byte 16 $readmemh(RAM_INIT_FILE, instr_memory);
end end
//Display what's in memory for debugging for (integer j = 0; j<$size(instr_memory); j++) begin
for (integer j = 0; j<$size(memory); j++) begin $display("byte +%h: %h", 32'hBFC00000+j*4, instr_memory[j]);
$display("Byte %d, %h", j*4, memory[j]);
end end
end end
//Combinatorial read path for data and instruction. //Combinatorial read path for data and instruction.
assign data_readdata = data_read ? {memory[data_address],memory[data_address+1],memory[data_address+2],memory[data_address+3]} : 16'hxxxx; assign data_readdata = data_read ? data_memory[data_address>>2] : 32'hxxxxxxxx;
assign instr_readdata = memory[instr_address/4]; assign instr_readdata = (instr_address >= 32'hBFC00000 && instr_address < 32'hBFC00000+$size(instr_memory)) ? instr_memory[(instr_address-32'hBFC00000)>>2] : 32'hxxxxxxxx;
//Synchronous write path //Synchronous write path
@ -62,10 +49,8 @@ module mips_cpu_memory(
//$display("RAM : INFO : data_read=%h, data_address = %h, mem=%h", data_read, data_address, memory[data_address]); //$display("RAM : INFO : data_read=%h, data_address = %h, mem=%h", data_read, data_address, memory[data_address]);
if (!data_read & data_write) begin //cannot read and write to memory in the same cycle if (!data_read & data_write) begin //cannot read and write to memory in the same cycle
if (instr_address != data_address) begin //cannot modify the instruction being read if (instr_address != data_address) begin //cannot modify the instruction being read
memory[data_address] <= data_writedata; data_memory[data_address] <= data_writedata;
end end
end end
end end
endmodule endmodule