From 84adff2ed126708020f66db4a9cb4cb8dd09efe7 Mon Sep 17 00:00:00 2001
From: jl7719 <jl7719@ic.ac.uk>
Date: Thu, 10 Dec 2020 19:14:16 +0900
Subject: [PATCH] Update memory

No longer need the massive memory
---
 rtl/mips_cpu_memory.v | 41 +++++++++++++----------------------------
 1 file changed, 13 insertions(+), 28 deletions(-)

diff --git a/rtl/mips_cpu_memory.v b/rtl/mips_cpu_memory.v
index 45aa576..ee7544e 100644
--- a/rtl/mips_cpu_memory.v
+++ b/rtl/mips_cpu_memory.v
@@ -1,19 +1,3 @@
-/*  
-Memory for Harvard Interface
-- RAM Size: 32 x 2^32 = 32 x 4294967296
-- Instructions in binaries or hex -> RAM_INIT_FILE
-- combinatorial read/fetch of instruction via instr_ port
-- combinatorial read and single cycle write of data via data_ port
-
-Instantiation of Memory Module
-- mips_cpu_memory #(RAM_INIT_FILE) ramInst(clk, data_address, data_write, data_read, data_writedata, data_readdata, instr_address, instr_readdata);
-
-Special Memory Locations
-- Whether a particular address maps to RAM, ROM, or something else is entirely down to the top-level circuit outside your CPU.
-- special memory locations: 0x00000000 (CPU halt), 0xBFC00000 (start execution after reset)
-- PC should be 0xBFC00000 at the start and 0x00000000 at the end
-*/
-
 module mips_cpu_memory(
     input logic clk,
 
@@ -31,29 +15,32 @@ module mips_cpu_memory(
 );
     parameter RAM_INIT_FILE = "";
 
-    reg [31:0] memory [0:7];   // 2^30 set as 8 for now for small testcases
+    reg [31:0] data_memory [0:63];
+    reg [31:0] instr_memory [0:63];
 
     initial begin
         integer i;
         //Initialise to zero by default
-        for (i=0; i<8; i++) begin
-            memory[i]=0;
+        for (i=0; i<$size(data_memory); i++) begin
+            data_memory[i] = 0;
+        end
+        for (i=0; i<$size(instr_memory); i++) begin
+            instr_memory[i] = 0;
         end
         //Load contents from file if specified
         if (RAM_INIT_FILE != "") begin
             $display("RAM: Loading RAM contents from %s", RAM_INIT_FILE);
-            $readmemh(RAM_INIT_FILE, memory, 32'h4); //32'hBFC00000 equivalent for small memory as byte 16
+            $readmemh(RAM_INIT_FILE, instr_memory);
         end
 
-        //Display what's in memory for debugging
-        for (integer j = 0; j<$size(memory); j++) begin
-            $display("Byte %d, %h", j*4, memory[j]);
+        for (integer j = 0; j<$size(instr_memory); j++) begin
+            $display("byte +%h: %h", 32'hBFC00000+j*4, instr_memory[j]);
         end
     end
 
     //Combinatorial read path for data and instruction.
-    assign data_readdata = data_read ? {memory[data_address],memory[data_address+1],memory[data_address+2],memory[data_address+3]} : 16'hxxxx;
-    assign instr_readdata = memory[instr_address/4];
+    assign data_readdata = data_read ? data_memory[data_address>>2] : 32'hxxxxxxxx;
+    assign instr_readdata = (instr_address >= 32'hBFC00000 && instr_address < 32'hBFC00000+$size(instr_memory)) ? instr_memory[(instr_address-32'hBFC00000)>>2] : 32'hxxxxxxxx;
 
 
     //Synchronous write path
@@ -62,10 +49,8 @@ module mips_cpu_memory(
         //$display("RAM : INFO : data_read=%h, data_address = %h, mem=%h", data_read, data_address, memory[data_address]);
         if (!data_read & data_write) begin              //cannot read and write to memory in the same cycle
             if (instr_address != data_address) begin    //cannot modify the instruction being read
-                memory[data_address] <= data_writedata;            
+                data_memory[data_address] <= data_writedata;            
             end
         end
     end
 endmodule
-
-