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Fix regfile hazard from storing when inputs change

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This commit is contained in:
Aadi Desai 2020-12-02 19:13:41 +00:00
parent f2f8e05010
commit 847bf92add
1 changed files with 1 additions and 1 deletions
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2
rtl/mips_cpu_regfile.v
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@ -27,7 +27,7 @@ always_comb begin
readdata2 = memory[readreg2]; //combinatorially output register value based on read port 2 selector readdata2 = memory[readreg2]; //combinatorially output register value based on read port 2 selector
end end
always_ff @(posedge clk) begin always_ff @(negedge clk) begin
if (regwrite) begin if (regwrite) begin
case (opcode) case (opcode)
6'b100000: begin //lb, load byte 6'b100000: begin //lb, load byte