mirror of
https://github.com/supleed2/ELEC50010-IAC-CW.git
synced 2024-11-10 01:35:49 +00:00
Modify bus tb to compile bus version instead
This commit is contained in:
parent
4534ca6760
commit
744aee097f
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@ -1,13 +1,13 @@
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#!/bin/bash
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SRC_DIR=${1?Error: no source directory given in argument};
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SRC=$(ls ${SRC_DIR} | grep -E "harvard|memory|alu|regfile|pc|control"); # *** UPDATE THE SRC FOR BUS ***
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SRC=$(find ./${SRC_DIR}/*);
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SRC_TEMP="";
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for src in ${SRC}
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do
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SRC_TEMP+=${SRC_DIR}/${src}" ";
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SRC_TEMP+=${src}" ";
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done
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SRC=${SRC_TEMP}
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SRC=${SRC_TEMP};
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INSTR=${2:-"No instruction specified: running all testcases"};
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@ -22,12 +22,12 @@ then
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do
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TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}");
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iverilog -Wall -g2012 \
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-s mips_cpu_harvard_tb \
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-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.txt\" \
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-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \
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-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \
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-s mips_cpu_bus_tb \
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-P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.txt\" \
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-P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \
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-o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v \
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${SRC} 2> /dev/null
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./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${DIR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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./exec/mips_cpu_bus_tb_${TESTCASE} &> ./inputs/${DIR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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echo "$(tail -1 ./inputs/${DIR}/${TESTCASE}.log.txt)" > ./inputs/${DIR}/${TESTCASE}.out.txt; # register v0 output to compare with reference
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if diff -w ./inputs/${DIR}/${TESTCASE}.out.txt ./inputs/${DIR}/${TESTCASE}.ref.txt &> /dev/null # compare
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then
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@ -43,12 +43,12 @@ else
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do
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TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}");
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iverilog -Wall -g2012 \
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-s mips_cpu_harvard_tb \
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-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.txt\" \
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-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \
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-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \
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-s mips_cpu_bus_tb \
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-P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.txt\" \
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-P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \
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-o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v \
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${SRC} 2> /dev/null
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./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${INSTR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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./exec/mips_cpu_bus_tb_${TESTCASE} &> ./inputs/${INSTR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
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echo "$(tail -1 ./inputs/${INSTR}/${TESTCASE}.log.txt)" > ./inputs/${INSTR}/${TESTCASE}.out.txt; # register v0 output to compare with reference
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if diff -w ./inputs/${INSTR}/${TESTCASE}.out.txt ./inputs/${INSTR}/${TESTCASE}.ref.txt &> /dev/null # compare
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then
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@ -1,7 +1,7 @@
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module mips_cpu_bus_tb;
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parameter INSTR_INIT_FILE = "inputs/addiu.txt";
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parameter DATA_INIT_FILE = "inputs/addiu.data.txt";
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parameter INSTR_INIT_FILE = "";
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parameter DATA_INIT_FILE = "";
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parameter TIMEOUT_CYCLES = 1000; // Timeout cycles are higher to account for memory stall delays
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logic clk, reset, active, write, read, waitrequest;
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