diff --git a/test/test_mips_cpu_bus.sh b/test/test_mips_cpu_bus.sh index be22673..1b90fe7 100755 --- a/test/test_mips_cpu_bus.sh +++ b/test/test_mips_cpu_bus.sh @@ -1,13 +1,13 @@ #!/bin/bash SRC_DIR=${1?Error: no source directory given in argument}; -SRC=$(ls ${SRC_DIR} | grep -E "harvard|memory|alu|regfile|pc|control"); # *** UPDATE THE SRC FOR BUS *** +SRC=$(find ./${SRC_DIR}/*); SRC_TEMP=""; for src in ${SRC} do - SRC_TEMP+=${SRC_DIR}/${src}" "; + SRC_TEMP+=${src}" "; done -SRC=${SRC_TEMP} +SRC=${SRC_TEMP}; INSTR=${2:-"No instruction specified: running all testcases"}; @@ -22,12 +22,12 @@ then do TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}"); iverilog -Wall -g2012 \ - -s mips_cpu_harvard_tb \ - -P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.txt\" \ - -P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \ - -o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \ + -s mips_cpu_bus_tb \ + -P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.txt\" \ + -P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \ + -o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v \ ${SRC} 2> /dev/null - ./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${DIR}/${TESTCASE}.log.txt; # log file for debugging (contains $display) + ./exec/mips_cpu_bus_tb_${TESTCASE} &> ./inputs/${DIR}/${TESTCASE}.log.txt; # log file for debugging (contains $display) echo "$(tail -1 ./inputs/${DIR}/${TESTCASE}.log.txt)" > ./inputs/${DIR}/${TESTCASE}.out.txt; # register v0 output to compare with reference if diff -w ./inputs/${DIR}/${TESTCASE}.out.txt ./inputs/${DIR}/${TESTCASE}.ref.txt &> /dev/null # compare then @@ -43,12 +43,12 @@ else do TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}"); iverilog -Wall -g2012 \ - -s mips_cpu_harvard_tb \ - -P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.txt\" \ - -P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \ - -o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \ + -s mips_cpu_bus_tb \ + -P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.txt\" \ + -P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \ + -o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v \ ${SRC} 2> /dev/null - ./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${INSTR}/${TESTCASE}.log.txt; # log file for debugging (contains $display) + ./exec/mips_cpu_bus_tb_${TESTCASE} &> ./inputs/${INSTR}/${TESTCASE}.log.txt; # log file for debugging (contains $display) echo "$(tail -1 ./inputs/${INSTR}/${TESTCASE}.log.txt)" > ./inputs/${INSTR}/${TESTCASE}.out.txt; # register v0 output to compare with reference if diff -w ./inputs/${INSTR}/${TESTCASE}.out.txt ./inputs/${INSTR}/${TESTCASE}.ref.txt &> /dev/null # compare then diff --git a/testbench/mips_cpu_bus_tb.v b/testbench/mips_cpu_bus_tb.v index fd29a2d..ee7afa8 100644 --- a/testbench/mips_cpu_bus_tb.v +++ b/testbench/mips_cpu_bus_tb.v @@ -1,7 +1,7 @@ module mips_cpu_bus_tb; -parameter INSTR_INIT_FILE = "inputs/addiu.txt"; -parameter DATA_INIT_FILE = "inputs/addiu.data.txt"; +parameter INSTR_INIT_FILE = ""; +parameter DATA_INIT_FILE = ""; parameter TIMEOUT_CYCLES = 1000; // Timeout cycles are higher to account for memory stall delays logic clk, reset, active, write, read, waitrequest;