Modify bus tb to compile bus version instead

This commit is contained in:
Aadi Desai 2020-12-16 20:15:08 +00:00
parent 4534ca6760
commit 744aee097f
2 changed files with 15 additions and 15 deletions

View file

@ -1,13 +1,13 @@
#!/bin/bash #!/bin/bash
SRC_DIR=${1?Error: no source directory given in argument}; SRC_DIR=${1?Error: no source directory given in argument};
SRC=$(ls ${SRC_DIR} | grep -E "harvard|memory|alu|regfile|pc|control"); # *** UPDATE THE SRC FOR BUS *** SRC=$(find ./${SRC_DIR}/*);
SRC_TEMP=""; SRC_TEMP="";
for src in ${SRC} for src in ${SRC}
do do
SRC_TEMP+=${SRC_DIR}/${src}" "; SRC_TEMP+=${src}" ";
done done
SRC=${SRC_TEMP} SRC=${SRC_TEMP};
INSTR=${2:-"No instruction specified: running all testcases"}; INSTR=${2:-"No instruction specified: running all testcases"};
@ -22,12 +22,12 @@ then
do do
TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}"); TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}");
iverilog -Wall -g2012 \ iverilog -Wall -g2012 \
-s mips_cpu_harvard_tb \ -s mips_cpu_bus_tb \
-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.txt\" \ -P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.txt\" \
-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \ -P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${DIR}/${TESTCASE}.data.txt\" \
-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \ -o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v \
${SRC} 2> /dev/null ${SRC} 2> /dev/null
./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${DIR}/${TESTCASE}.log.txt; # log file for debugging (contains $display) ./exec/mips_cpu_bus_tb_${TESTCASE} &> ./inputs/${DIR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
echo "$(tail -1 ./inputs/${DIR}/${TESTCASE}.log.txt)" > ./inputs/${DIR}/${TESTCASE}.out.txt; # register v0 output to compare with reference echo "$(tail -1 ./inputs/${DIR}/${TESTCASE}.log.txt)" > ./inputs/${DIR}/${TESTCASE}.out.txt; # register v0 output to compare with reference
if diff -w ./inputs/${DIR}/${TESTCASE}.out.txt ./inputs/${DIR}/${TESTCASE}.ref.txt &> /dev/null # compare if diff -w ./inputs/${DIR}/${TESTCASE}.out.txt ./inputs/${DIR}/${TESTCASE}.ref.txt &> /dev/null # compare
then then
@ -43,12 +43,12 @@ else
do do
TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}"); TESTCASE=$([[ ${TESTCASE} =~ /([^./]+)\. ]] && echo "${BASH_REMATCH[1]}");
iverilog -Wall -g2012 \ iverilog -Wall -g2012 \
-s mips_cpu_harvard_tb \ -s mips_cpu_bus_tb \
-P mips_cpu_harvard_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.txt\" \ -P mips_cpu_bus_tb.INSTR_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.txt\" \
-P mips_cpu_harvard_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \ -P mips_cpu_bus_tb.DATA_INIT_FILE=\"inputs/${INSTR}/${TESTCASE}.data.txt\" \
-o exec/mips_cpu_harvard_tb_${TESTCASE} testbench/mips_cpu_harvard_tb.v \ -o exec/mips_cpu_bus_tb_${TESTCASE} testbench/mips_cpu_bus_tb.v \
${SRC} 2> /dev/null ${SRC} 2> /dev/null
./exec/mips_cpu_harvard_tb_${TESTCASE} &> ./inputs/${INSTR}/${TESTCASE}.log.txt; # log file for debugging (contains $display) ./exec/mips_cpu_bus_tb_${TESTCASE} &> ./inputs/${INSTR}/${TESTCASE}.log.txt; # log file for debugging (contains $display)
echo "$(tail -1 ./inputs/${INSTR}/${TESTCASE}.log.txt)" > ./inputs/${INSTR}/${TESTCASE}.out.txt; # register v0 output to compare with reference echo "$(tail -1 ./inputs/${INSTR}/${TESTCASE}.log.txt)" > ./inputs/${INSTR}/${TESTCASE}.out.txt; # register v0 output to compare with reference
if diff -w ./inputs/${INSTR}/${TESTCASE}.out.txt ./inputs/${INSTR}/${TESTCASE}.ref.txt &> /dev/null # compare if diff -w ./inputs/${INSTR}/${TESTCASE}.out.txt ./inputs/${INSTR}/${TESTCASE}.ref.txt &> /dev/null # compare
then then

View file

@ -1,7 +1,7 @@
module mips_cpu_bus_tb; module mips_cpu_bus_tb;
parameter INSTR_INIT_FILE = "inputs/addiu.txt"; parameter INSTR_INIT_FILE = "";
parameter DATA_INIT_FILE = "inputs/addiu.data.txt"; parameter DATA_INIT_FILE = "";
parameter TIMEOUT_CYCLES = 1000; // Timeout cycles are higher to account for memory stall delays parameter TIMEOUT_CYCLES = 1000; // Timeout cycles are higher to account for memory stall delays
logic clk, reset, active, write, read, waitrequest; logic clk, reset, active, write, read, waitrequest;