Rename .v to .sv for Quartus to detect as SystemVerilog

rtl/mips_cpu_pc.sv

@@ -1,53 +1,53 @@
-module mips_cpu_pc(
+module mips_cpu_pc(
-input logic clk,
+input logic clk,
-input logic rst,
+input logic rst,
-input logic[31:0] Instr,
+input logic[31:0] Instr,
-input logic[31:0] JumpReg,
+input logic[31:0] JumpReg,
-input logic[1:0] pc_ctrl,
+input logic[1:0] pc_ctrl,
-output logic[31:0] pc_out,
+output logic[31:0] pc_out,
-output logic active
+output logic active
-);
+);
-
+
-logic[31:0] out_cpc_out;
+logic[31:0] out_cpc_out;
-logic[31:0] out_npc_out;
+logic[31:0] out_npc_out;
-logic[31:0] in_npc_in;
+logic[31:0] in_npc_in;
-
+
-assign pc_out = out_cpc_out;
+assign pc_out = out_cpc_out;
-
+
-always @(*) begin
+always @(*) begin
-    case(pc_ctrl)
+    case(pc_ctrl)
-        2'd0: begin
+        2'd0: begin
-            in_npc_in = out_npc_out + 32'd4;//No branch or jump or load.
+            in_npc_in = out_npc_out + 32'd4;//No branch or jump or load.
-        end
+        end
-        2'd1: begin
+        2'd1: begin
-            in_npc_in = out_npc_out + {{14{Instr[15]}}, Instr[15:0], 2'b00};
+            in_npc_in = out_npc_out + {{14{Instr[15]}}, Instr[15:0], 2'b00};
-        end
+        end
-        2'd2: begin
+        2'd2: begin
-            in_npc_in = {out_npc_out[31:28], Instr[25:0], 2'b00};
+            in_npc_in = {out_npc_out[31:28], Instr[25:0], 2'b00};
-        end
+        end
-        2'd3: begin
+        2'd3: begin
-            in_npc_in = JumpReg;
+            in_npc_in = JumpReg;
-        end
+        end
-    endcase	
+    endcase	
-end
+end
-
+
-mips_cpu_cpc cpc(
+mips_cpu_cpc cpc(
-//Inputs for cpc
+//Inputs for cpc
-	.clk(clk),
+	.clk(clk),
-	.rst(rst),
+	.rst(rst),
-	.cpc_in(out_npc_out),
+	.cpc_in(out_npc_out),
-//Outputs for cpc
+//Outputs for cpc
-	.cpc_out(out_cpc_out),
+	.cpc_out(out_cpc_out),
-    .active(active)
+    .active(active)
-);
+);
-
+
-mips_cpu_npc npc(
+mips_cpu_npc npc(
-//Inputs for npc
+//Inputs for npc
-	.clk(clk),
+	.clk(clk),
-	.rst(rst),
+	.rst(rst),
-	.npc_in(in_npc_in),
+	.npc_in(in_npc_in),
-//Outputs for npc
+//Outputs for npc
-	.npc_out(out_npc_out)
+	.npc_out(out_npc_out)
-);
+);
-
+
 endmodule