mirror of
https://github.com/supleed2/ELEC50003-P1-CW.git
synced 2024-09-20 04:16:17 +00:00
89 lines
2.9 KiB
Verilog
89 lines
2.9 KiB
Verilog
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module Qsys (
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alt_vip_itc_0_clocked_video_vid_clk,
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alt_vip_itc_0_clocked_video_vid_data,
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alt_vip_itc_0_clocked_video_underflow,
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alt_vip_itc_0_clocked_video_vid_datavalid,
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alt_vip_itc_0_clocked_video_vid_v_sync,
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alt_vip_itc_0_clocked_video_vid_h_sync,
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alt_vip_itc_0_clocked_video_vid_f,
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alt_vip_itc_0_clocked_video_vid_h,
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alt_vip_itc_0_clocked_video_vid_v,
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altpll_0_areset_conduit_export,
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altpll_0_locked_conduit_export,
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clk_clk,
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clk_sdram_clk,
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clk_vga_clk,
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d8m_xclkin_clk,
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eee_imgproc_0_conduit_mode_new_signal,
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i2c_opencores_camera_export_scl_pad_io,
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i2c_opencores_camera_export_sda_pad_io,
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i2c_opencores_mipi_export_scl_pad_io,
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i2c_opencores_mipi_export_sda_pad_io,
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key_external_connection_export,
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led_external_connection_export,
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mipi_pwdn_n_external_connection_export,
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mipi_reset_n_external_connection_export,
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reset_reset_n,
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sdram_wire_addr,
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sdram_wire_ba,
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sdram_wire_cas_n,
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sdram_wire_cke,
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sdram_wire_cs_n,
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sdram_wire_dq,
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sdram_wire_dqm,
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sdram_wire_ras_n,
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sdram_wire_we_n,
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sw_external_connection_export,
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terasic_auto_focus_0_conduit_vcm_i2c_sda,
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terasic_auto_focus_0_conduit_clk50,
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terasic_auto_focus_0_conduit_vcm_i2c_scl,
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terasic_camera_0_conduit_end_D,
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terasic_camera_0_conduit_end_FVAL,
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terasic_camera_0_conduit_end_LVAL,
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terasic_camera_0_conduit_end_PIXCLK);
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input alt_vip_itc_0_clocked_video_vid_clk;
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output [23:0] alt_vip_itc_0_clocked_video_vid_data;
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output alt_vip_itc_0_clocked_video_underflow;
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output alt_vip_itc_0_clocked_video_vid_datavalid;
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output alt_vip_itc_0_clocked_video_vid_v_sync;
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output alt_vip_itc_0_clocked_video_vid_h_sync;
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output alt_vip_itc_0_clocked_video_vid_f;
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output alt_vip_itc_0_clocked_video_vid_h;
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output alt_vip_itc_0_clocked_video_vid_v;
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input altpll_0_areset_conduit_export;
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output altpll_0_locked_conduit_export;
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input clk_clk;
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output clk_sdram_clk;
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output clk_vga_clk;
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output d8m_xclkin_clk;
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input eee_imgproc_0_conduit_mode_new_signal;
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inout i2c_opencores_camera_export_scl_pad_io;
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inout i2c_opencores_camera_export_sda_pad_io;
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inout i2c_opencores_mipi_export_scl_pad_io;
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inout i2c_opencores_mipi_export_sda_pad_io;
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input [1:0] key_external_connection_export;
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output [9:0] led_external_connection_export;
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output mipi_pwdn_n_external_connection_export;
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output mipi_reset_n_external_connection_export;
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input reset_reset_n;
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output [12:0] sdram_wire_addr;
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output [1:0] sdram_wire_ba;
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output sdram_wire_cas_n;
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output sdram_wire_cke;
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output sdram_wire_cs_n;
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inout [15:0] sdram_wire_dq;
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output [1:0] sdram_wire_dqm;
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output sdram_wire_ras_n;
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output sdram_wire_we_n;
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input [9:0] sw_external_connection_export;
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inout terasic_auto_focus_0_conduit_vcm_i2c_sda;
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input terasic_auto_focus_0_conduit_clk50;
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inout terasic_auto_focus_0_conduit_vcm_i2c_scl;
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input [11:0] terasic_camera_0_conduit_end_D;
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input terasic_camera_0_conduit_end_FVAL;
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input terasic_camera_0_conduit_end_LVAL;
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input terasic_camera_0_conduit_end_PIXCLK;
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endmodule
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