mirror of
https://github.com/supleed2/ELEC50003-P1-CW.git
synced 2024-11-12 18:55:50 +00:00
5417 lines
178 KiB
HTML
5417 lines
178 KiB
HTML
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
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<html xmlns="http://www.w3.org/1999/xhtml">
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<head>
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<title>datasheet for Qsys</title>
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<style type="text/css">
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body { font-family:arial ;}
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a { text-decoration:underline ; color:#003000 ;}
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a:hover { text-decoration:underline ; color:0030f0 ;}
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td { padding : 5px ;}
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table.topTitle { width:100% ;}
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table.topTitle td.l { text-align:left ; font-weight: bold ; font-size:30px ;}
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table.topTitle td.r { text-align:right ; font-weight: bold ; font-size:16px ;}
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table.blueBar { width : 100% ; border-spacing : 0px ;}
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table.blueBar td { background:#0036ff ; font-size:12px ; color : white ; text-align : left ; font-weight : bold ;}
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table.blueBar td.l { text-align : left ;}
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table.blueBar td.r { text-align : right ;}
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table.items { width:100% ; border-collapse:collapse ;}
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table.items td.label { font-weight:bold ; font-size:16px ; vertical-align:top ;}
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table.items td.mono { font-family:courier ; font-size:12px ; white-space:pre ;}
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div.label { font-weight:bold ; font-size:16px ; vertical-align:top ; text-align:center ;}
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table.grid { border-collapse:collapse ;}
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table.grid td { border:1px solid #bbb ; font-size:12px ;}
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body { font-family:arial ;}
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table.x { font-family:courier ; border-collapse:collapse ; padding:2px ;}
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table.x td { border:1px solid #bbb ;}
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td.tableTitle { font-weight:bold ; text-align:center ;}
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table.grid { border-collapse:collapse ;}
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table.grid td { border:1px solid #bbb ;}
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table.grid td.tableTitle { font-weight:bold ; text-align:center ;}
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table.mmap { border-collapse:collapse ; text-size:11px ; border:1px solid #d8d8d8 ;}
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table.mmap td { border-color:#d8d8d8 ; border-width:1px ; border-style:solid ;}
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table.mmap td.empty { border-style:none ; background-color:#f0f0f0 ;}
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table.mmap td.slavemodule { text-align:left ; font-size:11px ; border-style:solid solid none solid ;}
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table.mmap td.slavem { text-align:right ; font-size:9px ; font-style:italic ; border-style:none solid none solid ;}
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table.mmap td.slaveb { text-align:right ; font-size:9px ; font-style:italic ; border-style:none solid solid solid ;}
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table.mmap td.mastermodule { text-align:center ; font-size:11px ; border-style:solid solid none solid ;}
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table.mmap td.masterlr { text-align:center ; font-size:9px ; font-style:italic ; border-style:none solid solid solid ;}
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table.mmap td.masterl { text-align:center ; font-size:9px ; font-style:italic ; border-style:none none solid solid ;}
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table.mmap td.masterm { text-align:center ; font-size:9px ; font-style:italic ; border-style:none none solid none ;}
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table.mmap td.masterr { text-align:center ; font-size:9px ; font-style:italic ; border-style:none solid solid none ;}
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table.mmap td.addr { font-family:courier ; font-size:9px ; text-align:right ;}
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table.connectionboxes { border-collapse:separate ; border-spacing:0px ; font-family:arial ;}
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table.connectionboxes td.from { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:left ;}
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table.connectionboxes td.to { font-size:9px ; font-style:italic ; vertical-align:top ; text-align:right ;}
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table.connectionboxes td.lefthandwire { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:right ;}
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table.connectionboxes td.righthandwire { border-bottom:1px solid black ; font-size:9px ; font-style:italic ; vertical-align:bottom ; text-align:left ;}
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table.connectionboxes td.righthandlabel { font-size:11px ; vertical-align:bottom ; text-align:left ;}
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table.connectionboxes td.neighbor { padding:3px ; border:1px solid black ; font-size: 11px ; background:#e8e8e8 ; vertical-align:center ; text-align:center ;}
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table.connectionboxes td.main { padding:8px ; border:1px solid black ; font-size: 14px ; font-weight:bold ; background:#ffffff ; vertical-align:center ; text-align:center ;}
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.parametersbox { border:1px solid #d0d0d0 ; display:inline-block ; max-height:160px ; overflow:auto ; width:360px ; font-size:10px ;}
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.flowbox { display:inline-block ;}
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.parametersbox table { font-size:10px ;}
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td.parametername { font-style:italic ;}
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td.parametervalue { font-weight:bold ;}
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div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; border-top:1px solid #707070 ; border-bottom:1px solid #707070 ; padding:20px ; margin:20px ; width:auto ;}</style>
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</head>
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<body>
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<table class="topTitle">
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<tr>
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<td class="l">Qsys</td>
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<td class="r">
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<br/>
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<br/>
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</td>
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</tr>
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</table>
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<table class="blueBar">
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<tr>
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<td class="l">2021.03.30.09:18:34</td>
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<td class="r">Datasheet</td>
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</tr>
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</table>
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<div style="width:100% ; height:10px"> </div>
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<div class="label">Overview</div>
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<div class="greydiv">
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<div style="display:inline-block ; text-align:left">
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<table class="connectionboxes">
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<tr>
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<td class="lefthandwire">  clk_50 </td>
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<td class="main" rowspan="2">Qsys</td>
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</tr>
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<tr style="height:6px">
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<td></td>
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</tr>
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</table>
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</div><span style="display:inline-block ; width:28px"> </span>
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<div style="display:inline-block ; text-align:left"><span>Processor
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<br/>  
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<a href="#module_nios2_gen2"><b>nios2_gen2</b>
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</a> Nios II 16.0
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<br/>All Components
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<br/>  
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<a href="#module_TERASIC_AUTO_FOCUS_0"><b>TERASIC_AUTO_FOCUS_0</b>
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</a> TERASIC_AUTO_FOCUS 1.0
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<br/>  
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<a href="#module_altpll_0"><b>altpll_0</b>
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</a> altpll 16.0
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<br/>  
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<a href="#module_i2c_opencores_camera"><b>i2c_opencores_camera</b>
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</a> i2c_opencores 12.0
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<br/>  
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<a href="#module_i2c_opencores_mipi"><b>i2c_opencores_mipi</b>
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</a> i2c_opencores 12.0
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<br/>  
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<a href="#module_jtag_uart"><b>jtag_uart</b>
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</a> altera_avalon_jtag_uart 16.0
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<br/>  
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<a href="#module_key"><b>key</b>
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</a> altera_avalon_pio 16.0
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<br/>  
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<a href="#module_led"><b>led</b>
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</a> altera_avalon_pio 16.0
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<br/>  
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<a href="#module_mipi_pwdn_n"><b>mipi_pwdn_n</b>
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</a> altera_avalon_pio 16.0
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<br/>  
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<a href="#module_mipi_reset_n"><b>mipi_reset_n</b>
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</a> altera_avalon_pio 16.0
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<br/>  
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<a href="#module_nios2_gen2"><b>nios2_gen2</b>
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</a> altera_nios2_gen2 16.0
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<br/>  
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<a href="#module_onchip_memory2_0"><b>onchip_memory2_0</b>
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</a> altera_avalon_onchip_memory2 16.0
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<br/>  
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<a href="#module_sdram"><b>sdram</b>
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</a> altera_avalon_new_sdram_controller 16.0
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<br/>  
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<a href="#module_sw"><b>sw</b>
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</a> altera_avalon_pio 16.0
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<br/>  
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<a href="#module_sysid_qsys"><b>sysid_qsys</b>
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</a> altera_avalon_sysid_qsys 16.0
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<br/>  
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<a href="#module_timer"><b>timer</b>
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</a> altera_avalon_timer 16.0</span>
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</div>
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</div>
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<div style="width:100% ; height:10px"> </div>
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<div class="label">Memory Map</div>
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<table class="mmap">
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<tr>
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<td class="empty" rowspan="2"></td>
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<td class="mastermodule" colspan="2">
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<a href="#module_alt_vip_vfb_0"><b>alt_vip_vfb_0</b>
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</a>
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</td>
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<td class="mastermodule" colspan="2">
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<a href="#module_nios2_gen2"><b>nios2_gen2</b>
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</a>
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</td>
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</tr>
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<tr>
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<td class="masterl"> read_master</td>
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<td class="masterr"> write_master</td>
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<td class="masterl"> data_master</td>
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<td class="masterr"> instruction_master</td>
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</tr>
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<tr>
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<td class="slavemodule"> 
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<a href="#module_TERASIC_AUTO_FOCUS_0"><b>TERASIC_AUTO_FOCUS_0</b>
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</a>
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</td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slaveb">mm_ctrl </td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="addr"><span style="color:#989898">0x</span>00041020</td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slavemodule"> 
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<a href="#module_altpll_0"><b>altpll_0</b>
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</a>
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</td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slaveb">pll_slave </td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="addr"><span style="color:#989898">0x</span>000410d0</td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slavemodule"> 
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<a href="#module_i2c_opencores_camera"><b>i2c_opencores_camera</b>
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</a>
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</td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slaveb">avalon_slave_0 </td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="addr"><span style="color:#989898">0x</span>00041040</td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slavemodule"> 
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<a href="#module_i2c_opencores_mipi"><b>i2c_opencores_mipi</b>
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</a>
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</td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slaveb">avalon_slave_0 </td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="addr"><span style="color:#989898">0x</span>00041060</td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slavemodule"> 
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<a href="#module_jtag_uart"><b>jtag_uart</b>
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</a>
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</td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slaveb">avalon_jtag_slave </td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="addr"><span style="color:#989898">0x</span>000410e8</td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slavemodule"> 
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<a href="#module_key"><b>key</b>
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</a>
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</td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slaveb">s1 </td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="addr"><span style="color:#989898">0x</span>000410a0</td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slavemodule"> 
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<a href="#module_led"><b>led</b>
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</a>
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</td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slaveb">s1 </td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="addr"><span style="color:#989898">0x</span>000410c0</td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slavemodule"> 
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<a href="#module_mipi_pwdn_n"><b>mipi_pwdn_n</b>
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</a>
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</td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slaveb">s1 </td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="addr"><span style="color:#989898">0x</span>00041080</td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slavemodule"> 
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<a href="#module_mipi_reset_n"><b>mipi_reset_n</b>
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</a>
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</td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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<td class="empty"></td>
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</tr>
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<tr>
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<td class="slaveb">s1 </td>
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<td class="empty"></td>
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<td class="empty"></td>
|
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<td class="addr"><span style="color:#989898">0x</span>00041090</td>
|
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<td class="empty"></td>
|
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</tr>
|
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<tr>
|
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<td class="slavemodule"> 
|
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<a href="#module_nios2_gen2"><b>nios2_gen2</b>
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</a>
|
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</td>
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<td class="empty"></td>
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<td class="empty"></td>
|
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<td class="empty"></td>
|
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<td class="empty"></td>
|
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</tr>
|
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<tr>
|
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<td class="slaveb">debug_mem_slave </td>
|
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<td class="empty"></td>
|
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<td class="empty"></td>
|
|
<td class="addr"><span style="color:#989898">0x</span>00040800</td>
|
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<td class="addr"><span style="color:#989898">0x</span>00040800</td>
|
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</tr>
|
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<tr>
|
|
<td class="slavemodule"> 
|
|
<a href="#module_onchip_memory2_0"><b>onchip_memory2_0</b>
|
|
</a>
|
|
</td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
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<td class="empty"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="slaveb">s1 </td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
|
<td class="addr"><span style="color:#989898">0x</span>00020000</td>
|
|
<td class="addr"><span style="color:#989898">0x</span>00020000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="slavemodule"> 
|
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<a href="#module_sdram"><b>sdram</b>
|
|
</a>
|
|
</td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="slaveb">s1 </td>
|
|
<td class="addr"><span style="color:#989898">0x</span>04000000</td>
|
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<td class="addr"><span style="color:#989898">0x</span>04000000</td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="slavemodule"> 
|
|
<a href="#module_sw"><b>sw</b>
|
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</a>
|
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</td>
|
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<td class="empty"></td>
|
|
<td class="empty"></td>
|
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<td class="empty"></td>
|
|
<td class="empty"></td>
|
|
</tr>
|
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<tr>
|
|
<td class="slaveb">s1 </td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
|
<td class="addr"><span style="color:#989898">0x</span>000410b0</td>
|
|
<td class="empty"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="slavemodule"> 
|
|
<a href="#module_sysid_qsys"><b>sysid_qsys</b>
|
|
</a>
|
|
</td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="slaveb">control_slave </td>
|
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<td class="empty"></td>
|
|
<td class="empty"></td>
|
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<td class="addr"><span style="color:#989898">0x</span>000410e0</td>
|
|
<td class="empty"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="slavemodule"> 
|
|
<a href="#module_timer"><b>timer</b>
|
|
</a>
|
|
</td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
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<td class="empty"></td>
|
|
<td class="empty"></td>
|
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</tr>
|
|
<tr>
|
|
<td class="slaveb">s1 </td>
|
|
<td class="empty"></td>
|
|
<td class="empty"></td>
|
|
<td class="addr"><span style="color:#989898">0x</span>00041000</td>
|
|
<td class="empty"></td>
|
|
</tr>
|
|
</table>
|
|
<a name="module_TERASIC_AUTO_FOCUS_0"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>TERASIC_AUTO_FOCUS_0</h2>TERASIC_AUTO_FOCUS v1.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">data_master  </td>
|
|
<td class="main" rowspan="15">TERASIC_AUTO_FOCUS_0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  mm_ctrl</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_alt_vip_vfb_0">alt_vip_vfb_0</a>
|
|
</td>
|
|
<td class="from">dout  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  din</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_altpll_0">altpll_0</a>
|
|
</td>
|
|
<td class="from">c2  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clock</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">dout  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_alt_vip_itc_0">alt_vip_itc_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  din</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">VIDEO_W</td>
|
|
<td class="parametervalue">640</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">VIDEO_H</td>
|
|
<td class="parametervalue">480</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>(none)</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_TERASIC_CAMERA_0"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>TERASIC_CAMERA_0</h2>TERASIC_CAMERA v1.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_altpll_0">altpll_0</a>
|
|
</td>
|
|
<td class="from">c2  </td>
|
|
<td class="main" rowspan="10">TERASIC_CAMERA_0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clock_reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clock_reset_reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clock_reset_reset</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">avalon_streaming_source  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_alt_vip_vfb_0">alt_vip_vfb_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  din</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">VIDEO_W</td>
|
|
<td class="parametervalue">640</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">VIDEO_H</td>
|
|
<td class="parametervalue">480</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>(none)</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_alt_vip_itc_0"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>alt_vip_itc_0</h2>alt_vip_itc v14.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_TERASIC_AUTO_FOCUS_0">TERASIC_AUTO_FOCUS_0</a>
|
|
</td>
|
|
<td class="from">dout  </td>
|
|
<td class="main" rowspan="11">alt_vip_itc_0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  din</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_altpll_0">altpll_0</a>
|
|
</td>
|
|
<td class="from">c2  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  is_clk_rst</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  is_clk_rst_reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  is_clk_rst_reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">FAMILY</td>
|
|
<td class="parametervalue">MAX10FPGA</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">NUMBER_OF_COLOUR_PLANES</td>
|
|
<td class="parametervalue">3</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">COLOUR_PLANES_ARE_IN_PARALLEL</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">BPS</td>
|
|
<td class="parametervalue">8</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">INTERLACED</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">H_ACTIVE_PIXELS</td>
|
|
<td class="parametervalue">640</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">V_ACTIVE_LINES</td>
|
|
<td class="parametervalue">480</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">ACCEPT_COLOURS_IN_SEQ</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FIFO_DEPTH</td>
|
|
<td class="parametervalue">640</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLOCKS_ARE_SAME</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">USE_CONTROL</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">NO_OF_MODES</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">THRESHOLD</td>
|
|
<td class="parametervalue">639</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">STD_WIDTH</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">GENERATE_SYNC</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">USE_EMBEDDED_SYNCS</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AP_LINE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">V_BLANK</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">H_BLANK</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">H_SYNC_LENGTH</td>
|
|
<td class="parametervalue">96</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">H_FRONT_PORCH</td>
|
|
<td class="parametervalue">16</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">H_BACK_PORCH</td>
|
|
<td class="parametervalue">48</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">V_SYNC_LENGTH</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">V_FRONT_PORCH</td>
|
|
<td class="parametervalue">10</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">V_BACK_PORCH</td>
|
|
<td class="parametervalue">33</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">F_RISING_EDGE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">F_FALLING_EDGE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FIELD0_V_RISING_EDGE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FIELD0_V_BLANK</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FIELD0_V_SYNC_LENGTH</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FIELD0_V_FRONT_PORCH</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FIELD0_V_BACK_PORCH</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">ANC_LINE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FIELD0_ANC_LINE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>(none)</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_alt_vip_vfb_0"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>alt_vip_vfb_0</h2>alt_vip_vfb v13.1
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_TERASIC_CAMERA_0">TERASIC_CAMERA_0</a>
|
|
</td>
|
|
<td class="from">avalon_streaming_source  </td>
|
|
<td class="main" rowspan="18">alt_vip_vfb_0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  din</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_altpll_0">altpll_0</a>
|
|
</td>
|
|
<td class="from">c2  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clock</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">read_master  </td>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_sdram">sdram</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">write_master  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">dout  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_TERASIC_AUTO_FOCUS_0">TERASIC_AUTO_FOCUS_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  din</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">AUTO_WRITE_MASTER_CLOCKS_SAME</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_WRITE_MASTER_INTERRUPT_USED_MASK</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_READ_MASTER_MAX_READ_LATENCY</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_READ_MASTER_CLOCKS_SAME</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_WRITE_MASTER_MAX_READ_LATENCY</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_DEVICE_FAMILY</td>
|
|
<td class="parametervalue">MAX10FPGA</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_WRITER_CONTROL_CLOCKS_SAME</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_READ_MASTER_INTERRUPT_USED_MASK</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_READER_CONTROL_CLOCKS_SAME</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_READ_MASTER_NEED_ADDR_WIDTH</td>
|
|
<td class="parametervalue">27</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_WRITE_MASTER_NEED_ADDR_WIDTH</td>
|
|
<td class="parametervalue">27</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PARAMETERISATION</td>
|
|
<td class="parametervalue"><frameBufferParams><VFB_NAME>MyFrameBuffer</VFB_NAME><VFB_MAX_WIDTH>640</VFB_MAX_WIDTH><VFB_MAX_HEIGHT>480</VFB_MAX_HEIGHT><VFB_BPS>8</VFB_BPS><VFB_CHANNELS_IN_SEQ>1</VFB_CHANNELS_IN_SEQ><VFB_CHANNELS_IN_PAR>3</VFB_CHANNELS_IN_PAR><VFB_WRITER_RUNTIME_CONTROL>false</VFB_WRITER_RUNTIME_CONTROL><VFB_DROP_FRAMES>true</VFB_DROP_FRAMES><VFB_READER_RUNTIME_CONTROL>0</VFB_READER_RUNTIME_CONTROL><VFB_REPEAT_FRAMES>true</VFB_REPEAT_FRAMES><VFB_FRAMEBUFFERS_ADDR>00000000</VFB_FRAMEBUFFERS_ADDR><VFB_MEM_PORT_WIDTH>32</VFB_MEM_PORT_WIDTH><VFB_MEM_MASTERS_USE_SEPARATE_CLOCK>false</VFB_MEM_MASTERS_USE_SEPARATE_CLOCK><VFB_RDATA_FIFO_DEPTH>1024</VFB_RDATA_FIFO_DEPTH><VFB_RDATA_BURST_TARGET>4</VFB_RDATA_BURST_TARGET><VFB_WDATA_FIFO_DEPTH>1024</VFB_WDATA_FIFO_DEPTH><VFB_WDATA_BURST_TARGET>4</VFB_WDATA_BURST_TARGET><VFB_MAX_NUMBER_PACKETS>1</VFB_MAX_NUMBER_PACKETS><VFB_MAX_SYMBOLS_IN_PACKET>10</VFB_MAX_SYMBOLS_IN_PACKET><VFB_INTERLACED_SUPPORT>0</VFB_INTERLACED_SUPPORT><VFB_CONTROLLED_DROP_REPEAT>0</VFB_CONTROLLED_DROP_REPEAT><VFB_BURST_ALIGNMENT>0</VFB_BURST_ALIGNMENT><VFB_DROP_INVALID_FIELDS>false</VFB_DROP_INVALID_FIELDS></frameBufferParams></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">MAX 10</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>(none)</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_altpll_0"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>altpll_0</h2>altpll v16.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">data_master  </td>
|
|
<td class="main" rowspan="21">altpll_0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  pll_slave</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  inclk_interface</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  inclk_interface_reset</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">c2  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_sdram">sdram</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  clk</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">c2  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_TERASIC_AUTO_FOCUS_0">TERASIC_AUTO_FOCUS_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  clock</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">c2  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_alt_vip_vfb_0">alt_vip_vfb_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  clock</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">c2  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_TERASIC_CAMERA_0">TERASIC_CAMERA_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  clock_reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">c2  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_alt_vip_itc_0">alt_vip_itc_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  is_clk_rst</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">HIDDEN_CUSTOM_ELABORATION</td>
|
|
<td class="parametervalue">altpll_avalon_elaboration</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HIDDEN_CUSTOM_POST_EDIT</td>
|
|
<td class="parametervalue">altpll_avalon_post_edit</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">INTENDED_DEVICE_FAMILY</td>
|
|
<td class="parametervalue">MAX 10</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">WIDTH_CLOCK</td>
|
|
<td class="parametervalue">5</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">WIDTH_PHASECOUNTERSELECT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PRIMARY_CLOCK</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">INCLK0_INPUT_FREQUENCY</td>
|
|
<td class="parametervalue">20000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">INCLK1_INPUT_FREQUENCY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">OPERATION_MODE</td>
|
|
<td class="parametervalue">NORMAL</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PLL_TYPE</td>
|
|
<td class="parametervalue">AUTO</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">QUALIFY_CONF_DONE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">COMPENSATE_CLOCK</td>
|
|
<td class="parametervalue">CLK0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SCAN_CHAIN</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">GATE_LOCK_SIGNAL</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">GATE_LOCK_COUNTER</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">LOCK_HIGH</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">LOCK_LOW</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">VALID_LOCK_MULTIPLIER</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">INVALID_LOCK_MULTIPLIER</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SWITCH_OVER_ON_LOSSCLK</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SWITCH_OVER_ON_GATED_LOCK</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">ENABLE_SWITCH_OVER_COUNTER</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SKIP_VCO</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SWITCH_OVER_COUNTER</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SWITCH_OVER_TYPE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FEEDBACK_SOURCE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">BANDWIDTH</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">BANDWIDTH_TYPE</td>
|
|
<td class="parametervalue">AUTO</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SPREAD_FREQUENCY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DOWN_SPREAD</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SELF_RESET_ON_GATED_LOSS_LOCK</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SELF_RESET_ON_LOSS_LOCK</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK0_MULTIPLY_BY</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK1_MULTIPLY_BY</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK2_MULTIPLY_BY</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK3_MULTIPLY_BY</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK4_MULTIPLY_BY</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK5_MULTIPLY_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK6_MULTIPLY_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK7_MULTIPLY_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK8_MULTIPLY_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK9_MULTIPLY_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK0_MULTIPLY_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK1_MULTIPLY_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK2_MULTIPLY_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK3_MULTIPLY_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK0_DIVIDE_BY</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK1_DIVIDE_BY</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK2_DIVIDE_BY</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK3_DIVIDE_BY</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK4_DIVIDE_BY</td>
|
|
<td class="parametervalue">5</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK5_DIVIDE_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK6_DIVIDE_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK7_DIVIDE_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK8_DIVIDE_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK9_DIVIDE_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK0_DIVIDE_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK1_DIVIDE_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK2_DIVIDE_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK3_DIVIDE_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK0_PHASE_SHIFT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK1_PHASE_SHIFT</td>
|
|
<td class="parametervalue">7500</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK2_PHASE_SHIFT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK3_PHASE_SHIFT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK4_PHASE_SHIFT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK5_PHASE_SHIFT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK6_PHASE_SHIFT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK7_PHASE_SHIFT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK8_PHASE_SHIFT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK9_PHASE_SHIFT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK0_PHASE_SHIFT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK1_PHASE_SHIFT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK2_PHASE_SHIFT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK3_PHASE_SHIFT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK0_DUTY_CYCLE</td>
|
|
<td class="parametervalue">50</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK1_DUTY_CYCLE</td>
|
|
<td class="parametervalue">50</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK2_DUTY_CYCLE</td>
|
|
<td class="parametervalue">50</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK3_DUTY_CYCLE</td>
|
|
<td class="parametervalue">50</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK4_DUTY_CYCLE</td>
|
|
<td class="parametervalue">50</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK5_DUTY_CYCLE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK6_DUTY_CYCLE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK7_DUTY_CYCLE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK8_DUTY_CYCLE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CLK9_DUTY_CYCLE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK0_DUTY_CYCLE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK1_DUTY_CYCLE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK2_DUTY_CYCLE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXTCLK3_DUTY_CYCLE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clkena0</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clkena1</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clkena2</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clkena3</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clkena4</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clkena5</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_extclkena0</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_extclkena1</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_extclkena2</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_extclkena3</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_extclk0</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_extclk1</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_extclk2</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_extclk3</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_CLKBAD0</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_CLKBAD1</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clk0</td>
|
|
<td class="parametervalue">PORT_USED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clk1</td>
|
|
<td class="parametervalue">PORT_USED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clk2</td>
|
|
<td class="parametervalue">PORT_USED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clk3</td>
|
|
<td class="parametervalue">PORT_USED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clk4</td>
|
|
<td class="parametervalue">PORT_USED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clk5</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clk6</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clk7</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clk8</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_clk9</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_SCANDATA</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_SCANDATAOUT</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_SCANDONE</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_SCLKOUT1</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_SCLKOUT0</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_ACTIVECLOCK</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_CLKLOSS</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_INCLK1</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_INCLK0</td>
|
|
<td class="parametervalue">PORT_USED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_FBIN</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_PLLENA</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_CLKSWITCH</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_ARESET</td>
|
|
<td class="parametervalue">PORT_USED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_PFDENA</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_SCANCLK</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_SCANACLR</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_SCANREAD</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_SCANWRITE</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_ENABLE0</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_ENABLE1</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_LOCKED</td>
|
|
<td class="parametervalue">PORT_USED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_CONFIGUPDATE</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_FBOUT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_PHASEDONE</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_PHASESTEP</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_PHASEUPDOWN</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_SCANCLKENA</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_PHASECOUNTERSELECT</td>
|
|
<td class="parametervalue">PORT_UNUSED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_VCOOVERRANGE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PORT_VCOUNDERRANGE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DPA_MULTIPLY_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DPA_DIVIDE_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DPA_DIVIDER</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">VCO_MULTIPLY_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">VCO_DIVIDE_BY</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SCLKOUT0_PHASE_SHIFT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SCLKOUT1_PHASE_SHIFT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">VCO_FREQUENCY_CONTROL</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">VCO_PHASE_SHIFT_STEP</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">USING_FBMIMICBIDIR_PORT</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SCAN_CHAIN_MIF_FILE</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AVALON_USE_SEPARATE_SYSCLK</td>
|
|
<td class="parametervalue">NO</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HIDDEN_CONSTANTS</td>
|
|
<td class="parametervalue">CT#CLK2_DIVIDE_BY 1 CT#PORT_clk5 PORT_UNUSED CT#PORT_clk4 PORT_USED CT#PORT_clk3 PORT_USED CT#PORT_clk2 PORT_USED CT#PORT_clk1 PORT_USED CT#PORT_clk0 PORT_USED CT#CLK0_MULTIPLY_BY 2 CT#PORT_SCANWRITE PORT_UNUSED CT#PORT_SCANACLR PORT_UNUSED CT#PORT_PFDENA PORT_UNUSED CT#CLK3_DUTY_CYCLE 50 CT#CLK3_DIVIDE_BY 2 CT#PORT_PLLENA PORT_UNUSED CT#PORT_SCANDATA PORT_UNUSED CT#CLK3_PHASE_SHIFT 0 CT#PORT_SCANCLKENA PORT_UNUSED CT#CLK4_DIVIDE_BY 5 CT#WIDTH_CLOCK 5 CT#PORT_SCANDATAOUT PORT_UNUSED CT#CLK4_MULTIPLY_BY 2 CT#LPM_TYPE altpll CT#PLL_TYPE AUTO CT#CLK0_PHASE_SHIFT 0 CT#CLK1_DUTY_CYCLE 50 CT#PORT_PHASEDONE PORT_UNUSED CT#OPERATION_MODE NORMAL CT#PORT_CONFIGUPDATE PORT_UNUSED CT#CLK1_MULTIPLY_BY 2 CT#COMPENSATE_CLOCK CLK0 CT#PORT_CLKSWITCH PORT_UNUSED CT#CLK4_PHASE_SHIFT 0 CT#INCLK0_INPUT_FREQUENCY 20000 CT#CLK4_DUTY_CYCLE 50 CT#PORT_SCANDONE PORT_UNUSED CT#PORT_CLKLOSS PORT_UNUSED CT#PORT_INCLK1 PORT_UNUSED CT#AVALON_USE_SEPARATE_SYSCLK NO CT#PORT_INCLK0 PORT_USED CT#PORT_clkena5 PORT_UNUSED CT#PORT_clkena4 PORT_UNUSED CT#PORT_clkena3 PORT_UNUSED CT#PORT_clkena2 PORT_UNUSED CT#PORT_clkena1 PORT_UNUSED CT#PORT_clkena0 PORT_UNUSED CT#CLK1_PHASE_SHIFT 7500 CT#PORT_ARESET PORT_USED CT#BANDWIDTH_TYPE AUTO CT#CLK2_MULTIPLY_BY 2 CT#INTENDED_DEVICE_FAMILY {MAX 10} CT#PORT_SCANREAD PORT_UNUSED CT#CLK2_DUTY_CYCLE 50 CT#PORT_PHASESTEP PORT_UNUSED CT#PORT_SCANCLK PORT_UNUSED CT#PORT_CLKBAD1 PORT_UNUSED CT#PORT_CLKBAD0 PORT_UNUSED CT#PORT_FBIN PORT_UNUSED CT#PORT_PHASEUPDOWN PORT_UNUSED CT#PORT_extclk3 PORT_UNUSED CT#PORT_extclk2 PORT_UNUSED CT#PORT_extclk1 PORT_UNUSED CT#PORT_PHASECOUNTERSELECT PORT_UNUSED CT#PORT_extclk0 PORT_UNUSED CT#PORT_ACTIVECLOCK PORT_UNUSED CT#CLK2_PHASE_SHIFT 0 CT#CLK0_DUTY_CYCLE 50 CT#CLK0_DIVIDE_BY 1 CT#CLK1_DIVIDE_BY 1 CT#CLK3_MULTIPLY_BY 1 CT#PORT_LOCKED PORT_USED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HIDDEN_PRIVATES</td>
|
|
<td class="parametervalue">PT#GLOCKED_FEATURE_ENABLED 0 PT#SPREAD_FEATURE_ENABLED 0 PT#BANDWIDTH_FREQ_UNIT MHz PT#CUR_DEDICATED_CLK c0 PT#INCLK0_FREQ_EDIT 50.000 PT#BANDWIDTH_PRESET Low PT#PLL_LVDS_PLL_CHECK 0 PT#BANDWIDTH_USE_PRESET 0 PT#AVALON_USE_SEPARATE_SYSCLK NO PT#OUTPUT_FREQ_UNIT4 MHz PT#OUTPUT_FREQ_UNIT3 MHz PT#PLL_ENHPLL_CHECK 0 PT#OUTPUT_FREQ_UNIT2 MHz PT#OUTPUT_FREQ_UNIT1 MHz PT#OUTPUT_FREQ_UNIT0 MHz PT#PHASE_RECONFIG_FEATURE_ENABLED 1 PT#CREATE_CLKBAD_CHECK 0 PT#CLKSWITCH_CHECK 0 PT#INCLK1_FREQ_EDIT 100.000 PT#NORMAL_MODE_RADIO 1 PT#SRC_SYNCH_COMP_RADIO 0 PT#PLL_ARESET_CHECK 1 PT#LONG_SCAN_RADIO 1 PT#SCAN_FEATURE_ENABLED 1 PT#USE_CLK4 1 PT#USE_CLK3 1 PT#USE_CLK2 1 PT#PHASE_RECONFIG_INPUTS_CHECK 0 PT#USE_CLK1 1 PT#USE_CLK0 1 PT#PRIMARY_CLK_COMBO inclk0 PT#BANDWIDTH 1.000 PT#GLOCKED_COUNTER_EDIT_CHANGED 1 PT#PLL_FASTPLL_CHECK 0 PT#SPREAD_FREQ_UNIT KHz PT#LVDS_PHASE_SHIFT_UNIT4 deg PT#LVDS_PHASE_SHIFT_UNIT3 deg PT#PLL_AUTOPLL_CHECK 1 PT#OUTPUT_FREQ_MODE4 1 PT#LVDS_PHASE_SHIFT_UNIT2 deg PT#OUTPUT_FREQ_MODE3 1 PT#LVDS_PHASE_SHIFT_UNIT1 deg PT#OUTPUT_FREQ_MODE2 1 PT#LVDS_PHASE_SHIFT_UNIT0 deg PT#OUTPUT_FREQ_MODE1 1 PT#SWITCHOVER_FEATURE_ENABLED 0 PT#MIG_DEVICE_SPEED_GRADE Any PT#OUTPUT_FREQ_MODE0 1 PT#BANDWIDTH_FEATURE_ENABLED 1 PT#INCLK0_FREQ_UNIT_COMBO MHz PT#ZERO_DELAY_RADIO 0 PT#OUTPUT_FREQ4 20.00000000 PT#OUTPUT_FREQ3 25.00000000 PT#OUTPUT_FREQ2 100.00000000 PT#OUTPUT_FREQ1 100.00000000 PT#OUTPUT_FREQ0 100.00000000 PT#SHORT_SCAN_RADIO 0 PT#LVDS_MODE_DATA_RATE_DIRTY 0 PT#CUR_FBIN_CLK c0 PT#PLL_ADVANCED_PARAM_CHECK 0 PT#CLKBAD_SWITCHOVER_CHECK 0 PT#PHASE_SHIFT_STEP_ENABLED_CHECK 0 PT#DEVICE_SPEED_GRADE 6 PT#PLL_FBMIMIC_CHECK 0 PT#LVDS_MODE_DATA_RATE {Not Available} PT#PHASE_SHIFT4 0.00000000 PT#LOCKED_OUTPUT_CHECK 1 PT#SPREAD_PERCENT 0.500 PT#PHASE_SHIFT3 0.00000000 PT#DIV_FACTOR4 1 PT#PHASE_SHIFT2 0.00000000 PT#DIV_FACTOR3 1 PT#PHASE_SHIFT1 270.00000000 PT#DIV_FACTOR2 1 PT#PHASE_SHIFT0 0.00000000 PT#DIV_FACTOR1 1 PT#DIV_FACTOR0 1 PT#CNX_NO_COMPENSATE_RADIO 0 PT#USE_CLKENA4 0 PT#USE_CLKENA3 0 PT#USE_CLKENA2 0 PT#USE_CLKENA1 0 PT#USE_CLKENA0 0 PT#CREATE_INCLK1_CHECK 0 PT#GLOCK_COUNTER_EDIT 1048575 PT#INCLK1_FREQ_UNIT_COMBO MHz PT#EFF_OUTPUT_FREQ_VALUE4 20.000000 PT#EFF_OUTPUT_FREQ_VALUE3 25.000000 PT#EFF_OUTPUT_FREQ_VALUE2 100.000000 PT#EFF_OUTPUT_FREQ_VALUE1 100.000000 PT#EFF_OUTPUT_FREQ_VALUE0 100.000000 PT#SPREAD_FREQ 50.000 PT#USE_MIL_SPEED_GRADE 0 PT#EXPLICIT_SWITCHOVER_COUNTER 0 PT#STICKY_CLK4 1 PT#STICKY_CLK3 1 PT#STICKY_CLK2 1 PT#STICKY_CLK1 1 PT#STICKY_CLK0 1 PT#MIRROR_CLK4 0 PT#EXT_FEEDBACK_RADIO 0 PT#MIRROR_CLK3 0 PT#MIRROR_CLK2 0 PT#MIRROR_CLK1 0 PT#SWITCHOVER_COUNT_EDIT 1 PT#MIRROR_CLK0 0 PT#SELF_RESET_LOCK_LOSS 0 PT#PLL_PFDENA_CHECK 0 PT#INT_FEEDBACK__MODE_RADIO 1 PT#INCLK1_FREQ_EDIT_CHANGED 1 PT#SYNTH_WRAPPER_GEN_POSTFIX 0 PT#CLKLOSS_CHECK 0 PT#PHASE_SHIFT_UNIT4 deg PT#PHASE_SHIFT_UNIT3 deg PT#PHASE_SHIFT_UNIT2 deg PT#PHASE_SHIFT_UNIT1 deg PT#PHASE_SHIFT_UNIT0 deg PT#BANDWIDTH_USE_AUTO 1 PT#HAS_MANUAL_SWITCHOVER 1 PT#MULT_FACTOR4 1 PT#MULT_FACTOR3 1 PT#MULT_FACTOR2 1 PT#MULT_FACTOR1 1 PT#MULT_FACTOR0 1 PT#SPREAD_USE 0 PT#GLOCKED_MODE_CHECK 0 PT#DUTY_CYCLE4 50.00000000 PT#DUTY_CYCLE3 50.00000000 PT#DUTY_CYCLE2 50.00000000 PT#SACN_INPUTS_CHECK 0 PT#DUTY_CYCLE1 50.00000000 PT#INTENDED_DEVICE_FAMILY {MAX 10} PT#DUTY_CYCLE0 50.00000000 PT#PLL_TARGET_HARCOPY_CHECK 0 PT#INCLK1_FREQ_UNIT_CHANGED 1 PT#RECONFIG_FILE ALTPLL1472001986172141.mif PT#ACTIVECLK_CHECK 0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HIDDEN_USED_PORTS</td>
|
|
<td class="parametervalue">UP#locked used UP#c4 used UP#c3 used UP#c2 used UP#c1 used UP#c0 used UP#areset used UP#inclk0 used</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HIDDEN_IS_NUMERIC</td>
|
|
<td class="parametervalue">IN#WIDTH_CLOCK 1 IN#CLK0_DUTY_CYCLE 1 IN#CLK2_DIVIDE_BY 1 IN#PLL_TARGET_HARCOPY_CHECK 1 IN#CLK3_DIVIDE_BY 1 IN#CLK4_MULTIPLY_BY 1 IN#CLK1_MULTIPLY_BY 1 IN#CLK3_DUTY_CYCLE 1 IN#CLK4_DIVIDE_BY 1 IN#SWITCHOVER_COUNT_EDIT 1 IN#INCLK0_INPUT_FREQUENCY 1 IN#PLL_LVDS_PLL_CHECK 1 IN#PLL_AUTOPLL_CHECK 1 IN#PLL_FASTPLL_CHECK 1 IN#CLK1_DUTY_CYCLE 1 IN#PLL_ENHPLL_CHECK 1 IN#CLK2_MULTIPLY_BY 1 IN#DIV_FACTOR4 1 IN#DIV_FACTOR3 1 IN#DIV_FACTOR2 1 IN#DIV_FACTOR1 1 IN#DIV_FACTOR0 1 IN#LVDS_MODE_DATA_RATE_DIRTY 1 IN#CLK4_DUTY_CYCLE 1 IN#GLOCK_COUNTER_EDIT 1 IN#CLK2_DUTY_CYCLE 1 IN#CLK0_DIVIDE_BY 1 IN#CLK3_MULTIPLY_BY 1 IN#MULT_FACTOR4 1 IN#MULT_FACTOR3 1 IN#MULT_FACTOR2 1 IN#MULT_FACTOR1 1 IN#MULT_FACTOR0 1 IN#CLK0_MULTIPLY_BY 1 IN#USE_MIL_SPEED_GRADE 1 IN#CLK1_DIVIDE_BY 1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HIDDEN_MF_PORTS</td>
|
|
<td class="parametervalue">MF#areset 1 MF#clk 1 MF#locked 1 MF#inclk 1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HIDDEN_IF_PORTS</td>
|
|
<td class="parametervalue">IF#phasecounterselect {input 3} IF#locked {output 0} IF#reset {input 0} IF#clk {input 0} IF#phaseupdown {input 0} IF#scandone {output 0} IF#readdata {output 32} IF#write {input 0} IF#scanclk {input 0} IF#phasedone {output 0} IF#c4 {output 0} IF#c3 {output 0} IF#address {input 2} IF#c2 {output 0} IF#c1 {output 0} IF#c0 {output 0} IF#writedata {input 32} IF#read {input 0} IF#areset {input 0} IF#scanclkena {input 0} IF#scandataout {output 0} IF#configupdate {input 0} IF#phasestep {input 0} IF#scandata {input 0}</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HIDDEN_IS_FIRST_EDIT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_DEVICE_FAMILY</td>
|
|
<td class="parametervalue">MAX10FPGA</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_INCLK_INTERFACE_CLOCK_RATE</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">MAX 10</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>(none)</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_clk_50"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>clk_50</h2>clock_source v16.0
|
|
<br/>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">clockFrequency</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">clockFrequencyKnown</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">inputClockFrequency</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">resetSynchronousEdges</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>(none)</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_i2c_opencores_camera"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>i2c_opencores_camera</h2>i2c_opencores v12.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="6">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">data_master  </td>
|
|
<td class="main" rowspan="11">i2c_opencores_camera</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  avalon_slave_0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">irq  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  interrupt_sender</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clock_reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clock</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clock_reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>(none)</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_i2c_opencores_mipi"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>i2c_opencores_mipi</h2>i2c_opencores v12.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="6">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">data_master  </td>
|
|
<td class="main" rowspan="11">i2c_opencores_mipi</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  avalon_slave_0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">irq  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  interrupt_sender</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clock_reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clock</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clock_reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>(none)</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_jtag_uart"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>jtag_uart</h2>altera_avalon_jtag_uart v16.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="6">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">data_master  </td>
|
|
<td class="main" rowspan="11">jtag_uart</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  avalon_jtag_slave</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">irq  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  irq</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clk</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">allowMultipleConnections</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">hubInstanceID</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">readBufferDepth</td>
|
|
<td class="parametervalue">64</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">readIRQThreshold</td>
|
|
<td class="parametervalue">8</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">simInputCharacterStream</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">simInteractiveOptions</td>
|
|
<td class="parametervalue">NO_INTERACTIVE_WINDOWS</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">useRegistersForReadBuffer</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">useRegistersForWriteBuffer</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">useRelativePathForSimFile</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">writeBufferDepth</td>
|
|
<td class="parametervalue">64</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">writeIRQThreshold</td>
|
|
<td class="parametervalue">8</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">clkFreq</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">avalonSpec</td>
|
|
<td class="parametervalue">2.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">legacySignalAllow</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">enableInteractiveInput</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">enableInteractiveOutput</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">READ_DEPTH</td>
|
|
<td class="parametervalue">64</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">READ_THRESHOLD</td>
|
|
<td class="parametervalue">8</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">WRITE_DEPTH</td>
|
|
<td class="parametervalue">64</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">WRITE_THRESHOLD</td>
|
|
<td class="parametervalue">8</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_key"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>key</h2>altera_avalon_pio v16.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">data_master  </td>
|
|
<td class="main" rowspan="9">key</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clk</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">bitClearingEdgeCapReg</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">bitModifyingOutReg</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">captureEdge</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">direction</td>
|
|
<td class="parametervalue">Input</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">edgeType</td>
|
|
<td class="parametervalue">RISING</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateIRQ</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">irqType</td>
|
|
<td class="parametervalue">LEVEL</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">resetValue</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">simDoTestBenchWiring</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">simDrivenValue</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">width</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">clockRate</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_tri</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_out</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_in</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_do_test_bench_wiring</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_capture</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_edge_type</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_irq_type</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_irq</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">BIT_CLEARING_EDGE_REGISTER</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">BIT_MODIFYING_OUTPUT_REGISTER</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CAPTURE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DATA_WIDTH</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DO_TEST_BENCH_WIRING</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DRIVEN_SIM_VALUE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EDGE_TYPE</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FREQ</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_IN</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_OUT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_TRI</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">IRQ_TYPE</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">RESET_VALUE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_led"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>led</h2>altera_avalon_pio v16.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">data_master  </td>
|
|
<td class="main" rowspan="9">led</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clk</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">bitClearingEdgeCapReg</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">bitModifyingOutReg</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">captureEdge</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">direction</td>
|
|
<td class="parametervalue">Output</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">edgeType</td>
|
|
<td class="parametervalue">RISING</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateIRQ</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">irqType</td>
|
|
<td class="parametervalue">LEVEL</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">resetValue</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">simDoTestBenchWiring</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">simDrivenValue</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">width</td>
|
|
<td class="parametervalue">10</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">clockRate</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_tri</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_out</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_in</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_do_test_bench_wiring</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_capture</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_edge_type</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_irq_type</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_irq</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">BIT_CLEARING_EDGE_REGISTER</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">BIT_MODIFYING_OUTPUT_REGISTER</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CAPTURE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DATA_WIDTH</td>
|
|
<td class="parametervalue">10</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DO_TEST_BENCH_WIRING</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DRIVEN_SIM_VALUE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EDGE_TYPE</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FREQ</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_IN</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_OUT</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_TRI</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">IRQ_TYPE</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">RESET_VALUE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_mipi_pwdn_n"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>mipi_pwdn_n</h2>altera_avalon_pio v16.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">data_master  </td>
|
|
<td class="main" rowspan="9">mipi_pwdn_n</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clk</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">bitClearingEdgeCapReg</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">bitModifyingOutReg</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">captureEdge</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">direction</td>
|
|
<td class="parametervalue">Output</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">edgeType</td>
|
|
<td class="parametervalue">RISING</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateIRQ</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">irqType</td>
|
|
<td class="parametervalue">LEVEL</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">resetValue</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">simDoTestBenchWiring</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">simDrivenValue</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">width</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">clockRate</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_tri</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_out</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_in</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_do_test_bench_wiring</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_capture</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_edge_type</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_irq_type</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_irq</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">BIT_CLEARING_EDGE_REGISTER</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">BIT_MODIFYING_OUTPUT_REGISTER</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CAPTURE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DATA_WIDTH</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DO_TEST_BENCH_WIRING</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DRIVEN_SIM_VALUE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EDGE_TYPE</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FREQ</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_IN</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_OUT</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_TRI</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">IRQ_TYPE</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">RESET_VALUE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_mipi_reset_n"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>mipi_reset_n</h2>altera_avalon_pio v16.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">data_master  </td>
|
|
<td class="main" rowspan="9">mipi_reset_n</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clk</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">bitClearingEdgeCapReg</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">bitModifyingOutReg</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">captureEdge</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">direction</td>
|
|
<td class="parametervalue">Output</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">edgeType</td>
|
|
<td class="parametervalue">RISING</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateIRQ</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">irqType</td>
|
|
<td class="parametervalue">LEVEL</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">resetValue</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">simDoTestBenchWiring</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">simDrivenValue</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">width</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">clockRate</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_tri</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_out</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_in</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_do_test_bench_wiring</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_capture</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_edge_type</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_irq_type</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_irq</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">BIT_CLEARING_EDGE_REGISTER</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">BIT_MODIFYING_OUTPUT_REGISTER</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CAPTURE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DATA_WIDTH</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DO_TEST_BENCH_WIRING</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DRIVEN_SIM_VALUE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EDGE_TYPE</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FREQ</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_IN</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_OUT</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_TRI</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">IRQ_TYPE</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">RESET_VALUE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_nios2_gen2"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>nios2_gen2</h2>altera_nios2_gen2 v16.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk  </td>
|
|
<td class="main" rowspan="88">nios2_gen2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clk</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="6">
|
|
<a href="#module_jtag_uart">jtag_uart</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  avalon_jtag_slave</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">irq  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  irq</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="6">
|
|
<a href="#module_i2c_opencores_mipi">i2c_opencores_mipi</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  avalon_slave_0</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">irq  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  interrupt_sender</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  clock_reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="6">
|
|
<a href="#module_i2c_opencores_camera">i2c_opencores_camera</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  avalon_slave_0</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">irq  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  interrupt_sender</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  clock_reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_sysid_qsys">sysid_qsys</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  control_slave</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_TERASIC_AUTO_FOCUS_0">TERASIC_AUTO_FOCUS_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  mm_ctrl</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_altpll_0">altpll_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  pll_slave</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="6">
|
|
<a href="#module_onchip_memory2_0">onchip_memory2_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">instruction_master  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  reset1</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="6">
|
|
<a href="#module_timer">timer</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">irq  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  irq</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_led">led</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_sw">sw</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_key">key</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_mipi_reset_n">mipi_reset_n</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">data_master  </td>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_mipi_pwdn_n">mipi_pwdn_n</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_TERASIC_CAMERA_0">TERASIC_CAMERA_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  clock_reset_reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_alt_vip_itc_0">alt_vip_itc_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  is_clk_rst_reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_sdram">sdram</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="from">debug_reset_request  </td>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_alt_vip_vfb_0">alt_vip_vfb_0</a>
|
|
</td>
|
|
</tr>
|
|
<tr>
|
|
<td></td>
|
|
<td></td>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">tmr_enabled</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_disable_tmr_inj</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_showUnpublishedSettings</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_showInternalSettings</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_preciseIllegalMemAccessException</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_exportPCB</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_exportdebuginfo</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_clearXBitsLDNonBypass</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_bigEndian</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_export_large_RAMs</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_asic_enabled</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_asic_synopsys_translate_on_off</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_asic_third_party_synthesis</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_asic_add_scan_mode_input</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_oci_version</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_fast_register_read</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_exportHostDebugPort</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_oci_export_jtag_signals</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_avalonDebugPortPresent</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_alwaysEncrypt</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">io_regionbase</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">io_regionsize</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_support31bitdcachebypass</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_activateTrace</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_allow_break_inst</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_activateTestEndChecker</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_ecc_sim_test_ports</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_disableocitrace</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_activateMonitors</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_HDLSimCachesCleared</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_HBreakTest</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_breakslaveoveride</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mpu_useLimit</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mpu_enabled</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mmu_enabled</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mmu_autoAssignTlbPtrSz</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">cpuReset</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">resetrequest_enabled</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_removeRAMinit</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_tmr_output_disable</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_shadowRegisterSets</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mpu_numOfInstRegion</td>
|
|
<td class="parametervalue">8</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mpu_numOfDataRegion</td>
|
|
<td class="parametervalue">8</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mmu_TLBMissExcOffset</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">resetOffset</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">exceptionOffset</td>
|
|
<td class="parametervalue">32</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">cpuID</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">breakOffset</td>
|
|
<td class="parametervalue">32</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">userDefinedSettings</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tracefilename</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">resetSlave</td>
|
|
<td class="parametervalue">onchip_memory2_0.s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mmu_TLBMissExcSlave</td>
|
|
<td class="parametervalue">None</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">exceptionSlave</td>
|
|
<td class="parametervalue">onchip_memory2_0.s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">breakSlave</td>
|
|
<td class="parametervalue">None</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_interruptControllerType</td>
|
|
<td class="parametervalue">Internal</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_branchpredictiontype</td>
|
|
<td class="parametervalue">Dynamic</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_bhtPtrSz</td>
|
|
<td class="parametervalue">8</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">cpuArchRev</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">stratix_dspblock_shift_mul</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">shifterType</td>
|
|
<td class="parametervalue">fast_le_shift</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">multiplierType</td>
|
|
<td class="parametervalue">mul_fast32</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mul_shift_choice</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mul_32_impl</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mul_64_impl</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">shift_rot_impl</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dividerType</td>
|
|
<td class="parametervalue">no_div</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mpu_minInstRegionSize</td>
|
|
<td class="parametervalue">12</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mpu_minDataRegionSize</td>
|
|
<td class="parametervalue">12</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mmu_uitlbNumEntries</td>
|
|
<td class="parametervalue">4</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mmu_udtlbNumEntries</td>
|
|
<td class="parametervalue">6</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mmu_tlbPtrSz</td>
|
|
<td class="parametervalue">7</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mmu_tlbNumWays</td>
|
|
<td class="parametervalue">16</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mmu_processIDNumBits</td>
|
|
<td class="parametervalue">8</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">impl</td>
|
|
<td class="parametervalue">Fast</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">icache_size</td>
|
|
<td class="parametervalue">4096</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">fa_cache_line</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">fa_cache_linesize</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">icache_tagramBlockType</td>
|
|
<td class="parametervalue">Automatic</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">icache_ramBlockType</td>
|
|
<td class="parametervalue">Automatic</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">icache_numTCIM</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">icache_burstType</td>
|
|
<td class="parametervalue">None</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dcache_bursts</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dcache_victim_buf_impl</td>
|
|
<td class="parametervalue">ram</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dcache_size</td>
|
|
<td class="parametervalue">2048</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dcache_tagramBlockType</td>
|
|
<td class="parametervalue">Automatic</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dcache_ramBlockType</td>
|
|
<td class="parametervalue">Automatic</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dcache_numTCDM</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_exportvectors</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_usedesignware</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_ecc_present</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_ic_ecc_present</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_rf_ecc_present</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_mmu_ecc_present</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_dc_ecc_present</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_itcm_ecc_present</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_dtcm_ecc_present</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">regfile_ramBlockType</td>
|
|
<td class="parametervalue">Automatic</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">ocimem_ramBlockType</td>
|
|
<td class="parametervalue">Automatic</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">ocimem_ramInit</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mmu_ramBlockType</td>
|
|
<td class="parametervalue">Automatic</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">bht_ramBlockType</td>
|
|
<td class="parametervalue">Automatic</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">cdx_enabled</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mpx_enabled</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_enabled</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_triggerArming</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_debugReqSignals</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_assignJtagInstanceID</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_jtagInstanceID</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_OCIOnchipTrace</td>
|
|
<td class="parametervalue">_128</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_hwbreakpoint</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_datatrigger</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_traceType</td>
|
|
<td class="parametervalue">none</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_traceStorage</td>
|
|
<td class="parametervalue">onchip_trace</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">master_addr_map</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">instruction_master_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">instruction_master_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">flash_instruction_master_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">flash_instruction_master_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">data_master_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">data_master_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_instruction_master_0_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_instruction_master_0_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_instruction_master_1_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_instruction_master_1_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_instruction_master_2_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_instruction_master_2_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_instruction_master_3_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_instruction_master_3_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_data_master_0_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_data_master_0_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_data_master_1_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_data_master_1_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_data_master_2_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_data_master_2_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_data_master_3_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightly_coupled_data_master_3_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">instruction_master_high_performance_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">instruction_master_high_performance_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">data_master_high_performance_paddr_base</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">data_master_high_performance_paddr_size</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">resetAbsoluteAddr</td>
|
|
<td class="parametervalue">131072</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">exceptionAbsoluteAddr</td>
|
|
<td class="parametervalue">131104</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">breakAbsoluteAddr</td>
|
|
<td class="parametervalue">264224</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mmu_TLBMissExcAbsAddr</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dcache_bursts_derived</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dcache_size_derived</td>
|
|
<td class="parametervalue">2048</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">breakSlave_derived</td>
|
|
<td class="parametervalue">nios2_gen2.debug_mem_slave</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dcache_lineSize_derived</td>
|
|
<td class="parametervalue">32</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_ioregionBypassDCache</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">setting_bit31BypassDCache</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">translate_on</td>
|
|
<td class="parametervalue"> "synthesis translate_on" </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">translate_off</td>
|
|
<td class="parametervalue"> "synthesis translate_off" </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_onchiptrace</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_offchiptrace</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_insttrace</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">debug_datatrace</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">instAddrWidth</td>
|
|
<td class="parametervalue">19</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">faAddrWidth</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dataAddrWidth</td>
|
|
<td class="parametervalue">19</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledDataMaster0AddrWidth</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledDataMaster1AddrWidth</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledDataMaster2AddrWidth</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledDataMaster3AddrWidth</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledInstructionMaster0AddrWidth</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledInstructionMaster1AddrWidth</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledInstructionMaster2AddrWidth</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledInstructionMaster3AddrWidth</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dataMasterHighPerformanceAddrWidth</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">instructionMasterHighPerformanceAddrWidth</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">instSlaveMapParam</td>
|
|
<td class="parametervalue"><address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x386A0' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /></address-map></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">faSlaveMapParam</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dataSlaveMapParam</td>
|
|
<td class="parametervalue"><address-map><slave name='onchip_memory2_0.s1' start='0x20000' end='0x386A0' type='altera_avalon_onchip_memory2.s1' /><slave name='nios2_gen2.debug_mem_slave' start='0x40800' end='0x41000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='timer.s1' start='0x41000' end='0x41020' type='altera_avalon_timer.s1' /><slave name='TERASIC_AUTO_FOCUS_0.mm_ctrl' start='0x41020' end='0x41040' type='TERASIC_AUTO_FOCUS.mm_ctrl' /><slave name='i2c_opencores_camera.avalon_slave_0' start='0x41040' end='0x41060' type='i2c_opencores.avalon_slave_0' /><slave name='i2c_opencores_mipi.avalon_slave_0' start='0x41060' end='0x41080' type='i2c_opencores.avalon_slave_0' /><slave name='mipi_pwdn_n.s1' start='0x41080' end='0x41090' type='altera_avalon_pio.s1' /><slave name='mipi_reset_n.s1' start='0x41090' end='0x410A0' type='altera_avalon_pio.s1' /><slave name='key.s1' start='0x410A0' end='0x410B0' type='altera_avalon_pio.s1' /><slave name='sw.s1' start='0x410B0' end='0x410C0' type='altera_avalon_pio.s1' /><slave name='led.s1' start='0x410C0' end='0x410D0' type='altera_avalon_pio.s1' /><slave name='altpll_0.pll_slave' start='0x410D0' end='0x410E0' type='altpll.pll_slave' /><slave name='sysid_qsys.control_slave' start='0x410E0' end='0x410E8' type='altera_avalon_sysid_qsys.control_slave' /><slave name='jtag_uart.avalon_jtag_slave' start='0x410E8' end='0x410F0' type='altera_avalon_jtag_uart.avalon_jtag_slave' /></address-map></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledDataMaster0MapParam</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledDataMaster1MapParam</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledDataMaster2MapParam</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledDataMaster3MapParam</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledInstructionMaster0MapParam</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledInstructionMaster1MapParam</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledInstructionMaster2MapParam</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">tightlyCoupledInstructionMaster3MapParam</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dataMasterHighPerformanceMapParam</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">instructionMasterHighPerformanceMapParam</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">clockFrequency</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamilyName</td>
|
|
<td class="parametervalue">MAX10FPGA</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">internalIrqMaskSystemInfo</td>
|
|
<td class="parametervalue">15</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">customInstSlavesSystemInfo</td>
|
|
<td class="parametervalue"><info/></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">customInstSlavesSystemInfo_nios_a</td>
|
|
<td class="parametervalue"><info/></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">customInstSlavesSystemInfo_nios_b</td>
|
|
<td class="parametervalue"><info/></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">customInstSlavesSystemInfo_nios_c</td>
|
|
<td class="parametervalue"><info/></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFeaturesSystemInfo</td>
|
|
<td class="parametervalue">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_DEVICE</td>
|
|
<td class="parametervalue">10M50DAF484C7G</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_DEVICE_SPEEDGRADE</td>
|
|
<td class="parametervalue">7</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_CLK_CLOCK_DOMAIN</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">AUTO_CLK_RESET_DOMAIN</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">BIG_ENDIAN</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">BREAK_ADDR</td>
|
|
<td class="parametervalue">0x00040820</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CPU_ARCH_NIOS2_R1</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CPU_FREQ</td>
|
|
<td class="parametervalue">50000000u</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CPU_ID_SIZE</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CPU_ID_VALUE</td>
|
|
<td class="parametervalue">0x00000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CPU_IMPLEMENTATION</td>
|
|
<td class="parametervalue">"fast"</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DATA_ADDR_WIDTH</td>
|
|
<td class="parametervalue">19</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DCACHE_BYPASS_MASK</td>
|
|
<td class="parametervalue">0x80000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DCACHE_LINE_SIZE</td>
|
|
<td class="parametervalue">32</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DCACHE_LINE_SIZE_LOG2</td>
|
|
<td class="parametervalue">5</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DCACHE_SIZE</td>
|
|
<td class="parametervalue">2048</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EXCEPTION_ADDR</td>
|
|
<td class="parametervalue">0x00020020</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FLASH_ACCELERATOR_LINES</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FLASH_ACCELERATOR_LINE_SIZE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FLUSHDA_SUPPORTED</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HARDWARE_DIVIDE_PRESENT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HARDWARE_MULTIPLY_PRESENT</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HARDWARE_MULX_PRESENT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_DEBUG_CORE</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_DEBUG_STUB</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_EXTRA_EXCEPTION_INFO</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_ILLEGAL_INSTRUCTION_EXCEPTION</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_JMPI_INSTRUCTION</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">ICACHE_LINE_SIZE</td>
|
|
<td class="parametervalue">32</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">ICACHE_LINE_SIZE_LOG2</td>
|
|
<td class="parametervalue">5</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">ICACHE_SIZE</td>
|
|
<td class="parametervalue">4096</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">INITDA_SUPPORTED</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">INST_ADDR_WIDTH</td>
|
|
<td class="parametervalue">19</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">NUM_OF_SHADOW_REG_SETS</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">OCI_VERSION</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">RESET_ADDR</td>
|
|
<td class="parametervalue">0x00020000</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_onchip_memory2_0"> </a>
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<div>
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<hr/>
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<h2>onchip_memory2_0</h2>altera_avalon_onchip_memory2 v16.0
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<br/>
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<div class="greydiv">
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<table class="connectionboxes">
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<tr>
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<td class="neighbor" rowspan="6">
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<a href="#module_nios2_gen2">nios2_gen2</a>
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</td>
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<td class="from">data_master  </td>
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<td class="main" rowspan="11">onchip_memory2_0</td>
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</tr>
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<tr>
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<td class="to">  s1</td>
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</tr>
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<tr>
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<td class="from">instruction_master  </td>
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</tr>
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<tr>
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<td class="to">  s1</td>
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</tr>
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<tr>
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<td class="from">debug_reset_request  </td>
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</tr>
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<tr>
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<td class="to">  reset1</td>
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</tr>
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<tr style="height:6px">
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<td></td>
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</tr>
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<tr>
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<td class="neighbor" rowspan="4">
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<a href="#module_clk_50">clk_50</a>
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</td>
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<td class="from">clk  </td>
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</tr>
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<tr>
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<td class="to">  clk1</td>
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</tr>
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<tr>
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<td class="from">clk_reset  </td>
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</tr>
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<tr>
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<td class="to">  reset1</td>
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</tr>
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</table>
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</div>
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<br/>
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<br/>
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<table class="flowbox">
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<tr>
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<td class="parametersbox">
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<h2>Parameters</h2>
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<table>
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<tr>
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<td class="parametername">allowInSystemMemoryContentEditor</td>
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<td class="parametervalue">false</td>
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</tr>
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<tr>
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<td class="parametername">blockType</td>
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<td class="parametervalue">AUTO</td>
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</tr>
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<tr>
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<td class="parametername">dataWidth</td>
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<td class="parametervalue">32</td>
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</tr>
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<tr>
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<td class="parametername">dataWidth2</td>
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<td class="parametervalue">32</td>
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</tr>
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<tr>
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<td class="parametername">dualPort</td>
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<td class="parametervalue">false</td>
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</tr>
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<tr>
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<td class="parametername">enableDiffWidth</td>
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<td class="parametervalue">false</td>
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</tr>
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<tr>
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<td class="parametername">initMemContent</td>
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<td class="parametervalue">false</td>
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</tr>
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<tr>
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<td class="parametername">initializationFileName</td>
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<td class="parametervalue">onchip_mem.hex</td>
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</tr>
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<tr>
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<td class="parametername">instanceID</td>
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<td class="parametervalue">NONE</td>
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</tr>
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<tr>
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<td class="parametername">memorySize</td>
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<td class="parametervalue">100000</td>
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</tr>
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<tr>
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<td class="parametername">readDuringWriteMode</td>
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<td class="parametervalue">DONT_CARE</td>
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</tr>
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<tr>
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<td class="parametername">simAllowMRAMContentsFile</td>
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<td class="parametervalue">false</td>
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</tr>
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<tr>
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<td class="parametername">simMemInitOnlyFilename</td>
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<td class="parametervalue">0</td>
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</tr>
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<tr>
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<td class="parametername">singleClockOperation</td>
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<td class="parametervalue">false</td>
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</tr>
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<tr>
|
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<td class="parametername">slave1Latency</td>
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<td class="parametervalue">1</td>
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</tr>
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<tr>
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<td class="parametername">slave2Latency</td>
|
|
<td class="parametervalue">1</td>
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</tr>
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<tr>
|
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<td class="parametername">useNonDefaultInitFile</td>
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<td class="parametervalue">false</td>
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</tr>
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<tr>
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<td class="parametername">copyInitFile</td>
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<td class="parametervalue">false</td>
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</tr>
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<tr>
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<td class="parametername">useShallowMemBlocks</td>
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<td class="parametervalue">false</td>
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</tr>
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<tr>
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<td class="parametername">writable</td>
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<td class="parametervalue">true</td>
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</tr>
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<tr>
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<td class="parametername">ecc_enabled</td>
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<td class="parametervalue">false</td>
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</tr>
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<tr>
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<td class="parametername">resetrequest_enabled</td>
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<td class="parametervalue">true</td>
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</tr>
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<tr>
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<td class="parametername">autoInitializationFileName</td>
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<td class="parametervalue">Qsys_onchip_memory2_0</td>
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</tr>
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<tr>
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<td class="parametername">deviceFamily</td>
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<td class="parametervalue">MAX10FPGA</td>
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</tr>
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<tr>
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<td class="parametername">deviceFeatures</td>
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<td class="parametervalue">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</td>
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</tr>
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<tr>
|
|
<td class="parametername">derived_set_addr_width</td>
|
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<td class="parametervalue">15</td>
|
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</tr>
|
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<tr>
|
|
<td class="parametername">derived_set_addr_width2</td>
|
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<td class="parametervalue">15</td>
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</tr>
|
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<tr>
|
|
<td class="parametername">derived_set_data_width</td>
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<td class="parametervalue">32</td>
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</tr>
|
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<tr>
|
|
<td class="parametername">derived_set_data_width2</td>
|
|
<td class="parametervalue">32</td>
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</tr>
|
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<tr>
|
|
<td class="parametername">derived_gui_ram_block_type</td>
|
|
<td class="parametervalue">Automatic</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_is_hardcopy</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_init_file_name</td>
|
|
<td class="parametervalue">Qsys_onchip_memory2_0.hex</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">ALLOW_IN_SYSTEM_MEMORY_CONTENT_EDITOR</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">ALLOW_MRAM_SIM_CONTENTS_ONLY_FILE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CONTENTS_INFO</td>
|
|
<td class="parametervalue">""</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DUAL_PORT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">GUI_RAM_BLOCK_TYPE</td>
|
|
<td class="parametervalue">AUTO</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">INIT_CONTENTS_FILE</td>
|
|
<td class="parametervalue">Qsys_onchip_memory2_0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">INIT_MEM_CONTENT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">INSTANCE_ID</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">NON_DEFAULT_INIT_FILE_ENABLED</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">RAM_BLOCK_TYPE</td>
|
|
<td class="parametervalue">AUTO</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">READ_DURING_WRITE_MODE</td>
|
|
<td class="parametervalue">DONT_CARE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SINGLE_CLOCK_OP</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SIZE_MULTIPLE</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SIZE_VALUE</td>
|
|
<td class="parametervalue">100000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">WRITABLE</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_sdram"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>sdram</h2>altera_avalon_new_sdram_controller v16.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_alt_vip_vfb_0">alt_vip_vfb_0</a>
|
|
</td>
|
|
<td class="from">read_master  </td>
|
|
<td class="main" rowspan="13">sdram</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">write_master  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_altpll_0">altpll_0</a>
|
|
</td>
|
|
<td class="from">c2  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clk</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="2">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">TAC</td>
|
|
<td class="parametervalue">5.5</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">TRCD</td>
|
|
<td class="parametervalue">20.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">TRFC</td>
|
|
<td class="parametervalue">70.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">TRP</td>
|
|
<td class="parametervalue">20.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">TWR</td>
|
|
<td class="parametervalue">14.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">casLatency</td>
|
|
<td class="parametervalue">3</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">columnWidth</td>
|
|
<td class="parametervalue">10</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">dataWidth</td>
|
|
<td class="parametervalue">16</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateSimulationModel</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">initRefreshCommands</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">model</td>
|
|
<td class="parametervalue">single_Micron_MT48LC4M32B2_7_chip</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">numberOfBanks</td>
|
|
<td class="parametervalue">4</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">numberOfChipSelects</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">pinsSharedViaTriState</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">powerUpDelay</td>
|
|
<td class="parametervalue">100.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">refreshPeriod</td>
|
|
<td class="parametervalue">15.625</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">rowWidth</td>
|
|
<td class="parametervalue">13</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">masteredTristateBridgeSlave</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">TMRD</td>
|
|
<td class="parametervalue">3</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">initNOPDelay</td>
|
|
<td class="parametervalue">0.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">registerDataIn</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">clockRate</td>
|
|
<td class="parametervalue">100000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">componentName</td>
|
|
<td class="parametervalue">Qsys_sdram</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">size</td>
|
|
<td class="parametervalue">67108864</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">addressWidth</td>
|
|
<td class="parametervalue">25</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">bankWidth</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">CAS_LATENCY</td>
|
|
<td class="parametervalue">3</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CONTENTS_INFO</td>
|
|
<td class="parametervalue"></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">INIT_NOP_DELAY</td>
|
|
<td class="parametervalue">0.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">INIT_REFRESH_COMMANDS</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">IS_INITIALIZED</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">POWERUP_DELAY</td>
|
|
<td class="parametervalue">100.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">REFRESH_PERIOD</td>
|
|
<td class="parametervalue">15.625</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">REGISTER_DATA_IN</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SDRAM_ADDR_WIDTH</td>
|
|
<td class="parametervalue">25</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SDRAM_BANK_WIDTH</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SDRAM_COL_WIDTH</td>
|
|
<td class="parametervalue">10</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SDRAM_DATA_WIDTH</td>
|
|
<td class="parametervalue">16</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SDRAM_NUM_BANKS</td>
|
|
<td class="parametervalue">4</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SDRAM_NUM_CHIPSELECTS</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SDRAM_ROW_WIDTH</td>
|
|
<td class="parametervalue">13</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SHARED_DATA</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SIM_MODEL_BASE</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">STARVATION_INDICATOR</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">TRISTATE_BRIDGE_SLAVE</td>
|
|
<td class="parametervalue">""</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">T_AC</td>
|
|
<td class="parametervalue">5.5</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">T_MRD</td>
|
|
<td class="parametervalue">3</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">T_RCD</td>
|
|
<td class="parametervalue">20.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">T_RFC</td>
|
|
<td class="parametervalue">70.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">T_RP</td>
|
|
<td class="parametervalue">20.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">T_WR</td>
|
|
<td class="parametervalue">14.0</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_sw"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>sw</h2>altera_avalon_pio v16.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">data_master  </td>
|
|
<td class="main" rowspan="9">sw</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clk</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">bitClearingEdgeCapReg</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">bitModifyingOutReg</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">captureEdge</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">direction</td>
|
|
<td class="parametervalue">Input</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">edgeType</td>
|
|
<td class="parametervalue">RISING</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateIRQ</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">irqType</td>
|
|
<td class="parametervalue">LEVEL</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">resetValue</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">simDoTestBenchWiring</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">simDrivenValue</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">width</td>
|
|
<td class="parametervalue">10</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">clockRate</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_tri</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_out</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_in</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_do_test_bench_wiring</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_capture</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_edge_type</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_irq_type</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">derived_has_irq</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">BIT_CLEARING_EDGE_REGISTER</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">BIT_MODIFYING_OUTPUT_REGISTER</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">CAPTURE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DATA_WIDTH</td>
|
|
<td class="parametervalue">10</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DO_TEST_BENCH_WIRING</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">DRIVEN_SIM_VALUE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">EDGE_TYPE</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FREQ</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_IN</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_OUT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">HAS_TRI</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">IRQ_TYPE</td>
|
|
<td class="parametervalue">NONE</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">RESET_VALUE</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_sysid_qsys"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>sysid_qsys</h2>altera_avalon_sysid_qsys v16.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">data_master  </td>
|
|
<td class="main" rowspan="9">sysid_qsys</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  control_slave</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clk</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">id</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">timestamp</td>
|
|
<td class="parametervalue">1617092314</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">ID</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">TIMESTAMP</td>
|
|
<td class="parametervalue">1617092314</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<a name="module_timer"> </a>
|
|
<div>
|
|
<hr/>
|
|
<h2>timer</h2>altera_avalon_timer v16.0
|
|
<br/>
|
|
<div class="greydiv">
|
|
<table class="connectionboxes">
|
|
<tr>
|
|
<td class="neighbor" rowspan="6">
|
|
<a href="#module_nios2_gen2">nios2_gen2</a>
|
|
</td>
|
|
<td class="from">data_master  </td>
|
|
<td class="main" rowspan="11">timer</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  s1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">irq  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  irq</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">debug_reset_request  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
<tr style="height:6px">
|
|
<td></td>
|
|
</tr>
|
|
<tr>
|
|
<td class="neighbor" rowspan="4">
|
|
<a href="#module_clk_50">clk_50</a>
|
|
</td>
|
|
<td class="from">clk  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  clk</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="from">clk_reset  </td>
|
|
</tr>
|
|
<tr>
|
|
<td class="to">  reset</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<br/>
|
|
<br/>
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Parameters</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">alwaysRun</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">counterSize</td>
|
|
<td class="parametervalue">32</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">fixedPeriod</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">period</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">periodUnits</td>
|
|
<td class="parametervalue">MSEC</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">resetOutput</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">snapshot</td>
|
|
<td class="parametervalue">true</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">timeoutPulseOutput</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">systemFrequency</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">watchdogPulse</td>
|
|
<td class="parametervalue">2</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">timerPreset</td>
|
|
<td class="parametervalue">FULL_FEATURED</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">periodUnitsString</td>
|
|
<td class="parametervalue">ms</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">valueInSecond</td>
|
|
<td class="parametervalue">0.001</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">loadValue</td>
|
|
<td class="parametervalue">49999</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">mult</td>
|
|
<td class="parametervalue">0.001</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">ticksPerSec</td>
|
|
<td class="parametervalue">1000.0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">slave_address_width</td>
|
|
<td class="parametervalue">3</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">deviceFamily</td>
|
|
<td class="parametervalue">UNKNOWN</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">generateLegacySim</td>
|
|
<td class="parametervalue">false</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>  
|
|
<table class="flowbox">
|
|
<tr>
|
|
<td class="parametersbox">
|
|
<h2>Software Assignments</h2>
|
|
<table>
|
|
<tr>
|
|
<td class="parametername">ALWAYS_RUN</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">COUNTER_SIZE</td>
|
|
<td class="parametervalue">32</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FIXED_PERIOD</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">FREQ</td>
|
|
<td class="parametervalue">50000000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">LOAD_VALUE</td>
|
|
<td class="parametervalue">49999</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">MULT</td>
|
|
<td class="parametervalue">0.001</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PERIOD</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">PERIOD_UNITS</td>
|
|
<td class="parametervalue">ms</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">RESET_OUTPUT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">SNAPSHOT</td>
|
|
<td class="parametervalue">1</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">TICKS_PER_SEC</td>
|
|
<td class="parametervalue">1000</td>
|
|
</tr>
|
|
<tr>
|
|
<td class="parametername">TIMEOUT_PULSE_OUTPUT</td>
|
|
<td class="parametervalue">0</td>
|
|
</tr>
|
|
</table>
|
|
</td>
|
|
</tr>
|
|
</table>
|
|
</div>
|
|
<table class="blueBar">
|
|
<tr>
|
|
<td class="l">generation took 0.00 seconds</td>
|
|
<td class="r">rendering took 0.04 seconds</td>
|
|
</tr>
|
|
</table>
|
|
</body>
|
|
</html>
|