ELEC50003-P1-CW/Vision/DE10_LITE_D8M_VIP_16/Qsys/Qsys.xml

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<?xml version="1.0" encoding="UTF-8"?>
<deploy
date="2021.03.30.09:18:43"
outputDirectory="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/">
<perimeter>
<parameter
name="AUTO_GENERATION_ID"
type="Integer"
defaultValue="0"
onHdl="0"
affectsHdl="1" />
<parameter
name="AUTO_UNIQUE_ID"
type="String"
defaultValue=""
onHdl="0"
affectsHdl="1" />
<parameter
name="AUTO_DEVICE_FAMILY"
type="String"
defaultValue="MAX 10"
onHdl="0"
affectsHdl="1" />
<parameter
name="AUTO_DEVICE"
type="String"
defaultValue="10M50DAF484C7G"
onHdl="0"
affectsHdl="1" />
<parameter
name="AUTO_DEVICE_SPEEDGRADE"
type="String"
defaultValue="7"
onHdl="0"
affectsHdl="1" />
<parameter
name="AUTO_CLK_CLOCK_RATE"
type="Long"
defaultValue="-1"
onHdl="0"
affectsHdl="1" />
<parameter
name="AUTO_CLK_CLOCK_DOMAIN"
type="Integer"
defaultValue="-1"
onHdl="0"
affectsHdl="1" />
<parameter
name="AUTO_CLK_RESET_DOMAIN"
type="Integer"
defaultValue="-1"
onHdl="0"
affectsHdl="1" />
<interface name="alt_vip_itc_0_clocked_video" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="alt_vip_itc_0_clocked_video_vid_clk"
direction="input"
role="vid_clk"
width="1" />
<port
name="alt_vip_itc_0_clocked_video_vid_data"
direction="output"
role="vid_data"
width="24" />
<port
name="alt_vip_itc_0_clocked_video_underflow"
direction="output"
role="underflow"
width="1" />
<port
name="alt_vip_itc_0_clocked_video_vid_datavalid"
direction="output"
role="vid_datavalid"
width="1" />
<port
name="alt_vip_itc_0_clocked_video_vid_v_sync"
direction="output"
role="vid_v_sync"
width="1" />
<port
name="alt_vip_itc_0_clocked_video_vid_h_sync"
direction="output"
role="vid_h_sync"
width="1" />
<port
name="alt_vip_itc_0_clocked_video_vid_f"
direction="output"
role="vid_f"
width="1" />
<port
name="alt_vip_itc_0_clocked_video_vid_h"
direction="output"
role="vid_h"
width="1" />
<port
name="alt_vip_itc_0_clocked_video_vid_v"
direction="output"
role="vid_v"
width="1" />
</interface>
<interface name="altpll_0_areset_conduit" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="altpll_0_areset_conduit_export"
direction="input"
role="export"
width="1" />
</interface>
<interface name="altpll_0_configupdate_conduit" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="altpll_0_configupdate_conduit_export"
direction="input"
role="export"
width="1" />
</interface>
<interface name="altpll_0_locked_conduit" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="altpll_0_locked_conduit_export"
direction="output"
role="export"
width="1" />
</interface>
<interface name="altpll_0_scanclkena_conduit" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="altpll_0_scanclkena_conduit_export"
direction="input"
role="export"
width="1" />
</interface>
<interface name="altpll_0_scandata_conduit" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="altpll_0_scandata_conduit_export"
direction="input"
role="export"
width="1" />
</interface>
<interface name="altpll_0_scandataout_conduit" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="altpll_0_scandataout_conduit_export"
direction="output"
role="export"
width="1" />
</interface>
<interface name="altpll_0_scandone_conduit" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="altpll_0_scandone_conduit_export"
direction="output"
role="export"
width="1" />
</interface>
<interface name="clk" kind="clock" start="0">
<property name="clockRate" value="50000000" />
<property name="externallyDriven" value="false" />
<property name="ptfSchematicName" value="" />
<port name="clk_clk" direction="input" role="clk" width="1" />
</interface>
<interface name="clk_sdram" kind="clock" start="1">
<property name="associatedDirectClock" value="" />
<property name="clockRate" value="100000000" />
<property name="clockRateKnown" value="true" />
<property name="externallyDriven" value="false" />
<property name="ptfSchematicName" value="" />
<port name="clk_sdram_clk" direction="output" role="clk" width="1" />
</interface>
<interface name="clk_vga" kind="clock" start="1">
<property name="associatedDirectClock" value="" />
<property name="clockRate" value="25000000" />
<property name="clockRateKnown" value="true" />
<property name="externallyDriven" value="false" />
<property name="ptfSchematicName" value="" />
<port name="clk_vga_clk" direction="output" role="clk" width="1" />
</interface>
<interface name="d8m_xclkin" kind="clock" start="1">
<property name="associatedDirectClock" value="" />
<property name="clockRate" value="20000000" />
<property name="clockRateKnown" value="true" />
<property name="externallyDriven" value="false" />
<property name="ptfSchematicName" value="" />
<port name="d8m_xclkin_clk" direction="output" role="clk" width="1" />
</interface>
<interface name="i2c_opencores_camera_export" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="i2c_opencores_camera_export_scl_pad_io"
direction="bidir"
role="scl_pad_io"
width="1" />
<port
name="i2c_opencores_camera_export_sda_pad_io"
direction="bidir"
role="sda_pad_io"
width="1" />
</interface>
<interface name="i2c_opencores_mipi_export" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="i2c_opencores_mipi_export_scl_pad_io"
direction="bidir"
role="scl_pad_io"
width="1" />
<port
name="i2c_opencores_mipi_export_sda_pad_io"
direction="bidir"
role="sda_pad_io"
width="1" />
</interface>
<interface name="key_external_connection" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="key_external_connection_export"
direction="input"
role="export"
width="2" />
</interface>
<interface name="led_external_connection" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="led_external_connection_export"
direction="output"
role="export"
width="10" />
</interface>
<interface name="mipi_pwdn_n_external_connection" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="mipi_pwdn_n_external_connection_export"
direction="output"
role="export"
width="1" />
</interface>
<interface name="mipi_reset_n_external_connection" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="mipi_reset_n_external_connection_export"
direction="output"
role="export"
width="1" />
</interface>
<interface name="reset" kind="reset" start="0">
<property name="associatedClock" value="" />
<property name="synchronousEdges" value="NONE" />
<port name="reset_reset_n" direction="input" role="reset_n" width="1" />
</interface>
<interface name="sdram_wire" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port name="sdram_wire_addr" direction="output" role="addr" width="13" />
<port name="sdram_wire_ba" direction="output" role="ba" width="2" />
<port name="sdram_wire_cas_n" direction="output" role="cas_n" width="1" />
<port name="sdram_wire_cke" direction="output" role="cke" width="1" />
<port name="sdram_wire_cs_n" direction="output" role="cs_n" width="1" />
<port name="sdram_wire_dq" direction="bidir" role="dq" width="16" />
<port name="sdram_wire_dqm" direction="output" role="dqm" width="2" />
<port name="sdram_wire_ras_n" direction="output" role="ras_n" width="1" />
<port name="sdram_wire_we_n" direction="output" role="we_n" width="1" />
</interface>
<interface name="sw_external_connection" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="sw_external_connection_export"
direction="input"
role="export"
width="10" />
</interface>
<interface name="terasic_auto_focus_0_conduit" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="reset" />
<port
name="terasic_auto_focus_0_conduit_vcm_i2c_sda"
direction="bidir"
role="vcm_i2c_sda"
width="1" />
<port
name="terasic_auto_focus_0_conduit_clk50"
direction="input"
role="clk50"
width="1" />
<port
name="terasic_auto_focus_0_conduit_vcm_i2c_scl"
direction="bidir"
role="vcm_i2c_scl"
width="1" />
</interface>
<interface name="terasic_camera_0_conduit_end" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<port
name="terasic_camera_0_conduit_end_D"
direction="input"
role="D"
width="12" />
<port
name="terasic_camera_0_conduit_end_FVAL"
direction="input"
role="FVAL"
width="1" />
<port
name="terasic_camera_0_conduit_end_LVAL"
direction="input"
role="LVAL"
width="1" />
<port
name="terasic_camera_0_conduit_end_PIXCLK"
direction="input"
role="PIXCLK"
width="1" />
</interface>
</perimeter>
<entity
path=""
parameterizationKey="Qsys:1.0:AUTO_CLK_CLOCK_DOMAIN=-1,AUTO_CLK_CLOCK_RATE=-1,AUTO_CLK_RESET_DOMAIN=-1,AUTO_DEVICE=10M50DAF484C7G,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=7,AUTO_GENERATION_ID=1617092314,AUTO_UNIQUE_ID=(TERASIC_AUTO_FOCUS:1.0:VIDEO_H=480,VIDEO_W=640)(TERASIC_CAMERA:1.0:VIDEO_H=480,VIDEO_W=640)(alt_vip_itc:14.0:ACCEPT_COLOURS_IN_SEQ=0,ANC_LINE=0,AP_LINE=0,BPS=8,CLOCKS_ARE_SAME=0,COLOUR_PLANES_ARE_IN_PARALLEL=1,FAMILY=MAX 10,FIELD0_ANC_LINE=0,FIELD0_V_BACK_PORCH=0,FIELD0_V_BLANK=0,FIELD0_V_FRONT_PORCH=0,FIELD0_V_RISING_EDGE=0,FIELD0_V_SYNC_LENGTH=0,FIFO_DEPTH=640,F_FALLING_EDGE=0,F_RISING_EDGE=0,GENERATE_SYNC=0,H_ACTIVE_PIXELS=640,H_BACK_PORCH=48,H_BLANK=0,H_FRONT_PORCH=16,H_SYNC_LENGTH=96,INTERLACED=0,NO_OF_MODES=1,NUMBER_OF_COLOUR_PLANES=3,STD_WIDTH=1,THRESHOLD=639,USE_CONTROL=0,USE_EMBEDDED_SYNCS=0,V_ACTIVE_LINES=480,V_BACK_PORCH=33,V_BLANK=0,V_FRONT_PORCH=10,V_SYNC_LENGTH=2)(alt_vip_vfb:13.1:AUTO_DEVICE_FAMILY=MAX 10,AUTO_READER_CONTROL_CLOCKS_SAME=0,AUTO_READ_MASTER_CLOCKS_SAME=0,AUTO_READ_MASTER_INTERRUPT_USED_MASK=0,AUTO_READ_MASTER_MAX_READ_LATENCY=2,AUTO_READ_MASTER_NEED_ADDR_WIDTH=27,AUTO_WRITER_CONTROL_CLOCKS_SAME=0,AUTO_WRITE_MASTER_CLOCKS_SAME=0,AUTO_WRITE_MASTER_INTERRUPT_USED_MASK=0,AUTO_WRITE_MASTER_MAX_READ_LATENCY=2,AUTO_WRITE_MASTER_NEED_ADDR_WIDTH=27,PARAMETERISATION=&lt;frameBufferParams&gt;&lt;VFB_NAME&gt;MyFrameBuffer&lt;/VFB_NAME&gt;&lt;VFB_MAX_WIDTH&gt;640&lt;/VFB_MAX_WIDTH&gt;&lt;VFB_MAX_HEIGHT&gt;480&lt;/VFB_MAX_HEIGHT&gt;&lt;VFB_BPS&gt;8&lt;/VFB_BPS&gt;&lt;VFB_CHANNELS_IN_SEQ&gt;1&lt;/VFB_CHANNELS_IN_SEQ&gt;&lt;VFB_CHANNELS_IN_PAR&gt;3&lt;/VFB_CHANNELS_IN_PAR&gt;&lt;VFB_WRITER_RUNTIME_CONTROL&gt;false&lt;/VFB_WRITER_RUNTIME_CONTROL&gt;&lt;VFB_DROP_FRAMES&gt;true&lt;/VFB_DROP_FRAMES&gt;&lt;VFB_READER_RUNTIME_CONTROL&gt;0&lt;/VFB_READER_RUNTIME_CONTROL&gt;&lt;VFB_REPEAT_FRAMES&gt;true&lt;/VFB_REPEAT_FRAMES&gt;&lt;VFB_FRAMEBUFFERS_ADDR&gt;00000000&lt;/VFB_FRAMEBUFFERS_ADDR&gt;&lt;VFB_MEM_PORT_WIDTH&gt;32&lt;/VFB_MEM_PORT_WIDTH&gt;&lt;VFB_MEM_MASTERS_USE_SEPARATE_CLOCK&gt;false&lt;/VFB_MEM_MASTERS_USE_SEPARATE_CLOCK&gt;&lt;VFB_RDATA_FIFO_DEPTH&gt;1024&lt;/VFB_RDATA_FIFO_DEPTH&gt;&lt;VFB_RDATA_BURST_TARGET&gt;4&lt;/VFB_RDATA_BURST_TARGET&gt;&lt;VFB_WDATA_FIFO_DEPTH&gt;1024&lt;/VFB_WDATA_FIFO_DEPTH&gt;&lt;VFB_WDATA_BURST_TARGET&gt;4&lt;/VFB_WDATA_BURST_TARGET&gt;&lt;VFB_MAX_NUMBER_PACKETS&gt;1&lt;/VFB_MAX_NUMBER_PACKETS&gt;&lt;VFB_MAX_SYMBOLS_IN_PACKET&gt;10&lt;/VFB_MAX_SYMBOLS_IN_PACKET&gt;&lt;VFB_INTERLACED_SUPPORT&gt;0&lt;/VFB_INTERLACED_SUPPORT&gt;&lt;VFB_CONTROLLED_DROP_REPEAT&gt;0&lt;/VFB_CONTROLLED_DROP_REPEAT&gt;&lt;VFB_BURST_ALIGNMENT&gt;0&lt;/VFB_BURST_ALIGNMENT&gt;&lt;VFB_DROP_INVALID_FIELDS&gt;false&lt;/VFB_DROP_INVALID_FIELDS&gt;&lt;/frameBufferParams&gt;)(altpll:16.0:AUTO_DEVICE_FAMILY=MAX 10,AUTO_INCLK_INTERFACE_CLOCK_RATE=50000000,AVALON_USE_SEPARATE_SYSCLK=NO,BANDWIDTH=,BANDWIDTH_TYPE=AUTO,CLK0_DIVIDE_BY=1,CLK0_DUTY_CYCLE=50,CLK0_MULTIPLY_BY=2,CLK0_PHASE_SHIFT=0,CLK1_DIVIDE_BY=1,CLK1_DUTY_CYCLE=50,CLK1_MULTIPLY_BY=2,CLK1_PHASE_SHIFT=7500,CLK2_DIVIDE_BY=1,CLK2_DUTY_CYCLE=50,CLK2_MULTIPLY_BY=2,CLK2_PHASE_SHIFT=0,CLK3_DIVIDE_BY=2,CLK3_DUTY_CYCLE=50,CLK3_MULTIPLY_BY=1,CLK3_PHASE_SHIFT=0,CLK4_DIVIDE_BY=5,CLK4_DUTY_CYCLE=50,CLK4_MULTIPLY_BY=2,CLK4_PHASE_SHIFT=0,CLK5_DIVIDE_BY=,CLK5_DUTY_CYCLE=,CLK5_MULTIPLY_BY=,CLK5_PHASE_SHIFT=,CLK6_DIVIDE_BY=,CLK6_DUTY_CYCLE=,CLK6_MULTIPLY_BY=,CLK6_PHASE_SHIFT=,CLK7_DIVIDE_BY=,CLK7_DUTY_CYCLE=,CLK7_MULTIPLY_BY=,CLK7_PHASE_SHIFT=,CLK8_DIVIDE_BY=,CLK8_DUTY_CYCLE=,CLK8_MULTIPLY_BY=,CLK8_PHASE_SHIFT=,CLK9_DIVIDE_BY=,CLK9_DUTY_CYCLE=,CLK9_MULTIPLY_BY=,CLK9_PHASE_SHIFT=,COMPENSATE_CLOCK=CLK0,DOWN_SPREAD=,DPA_DIVIDER=,DPA_DIVIDE_BY=,DPA_MULTIPLY_BY=,ENABLE_SWITCH_OVER_COUNTER=,EXTCLK0_DIVIDE_BY=,EXTCLK0_DUTY_CYCLE=,EXTCLK0_MULTIPLY_BY=,EXTCLK0_PHASE_SHIFT=,EXTCLK1_DIVIDE_BY=,EXTCLK1_DUTY_CYCLE=,EXTCLK1_MULTIPLY_BY=,EXTCLK1_PHASE_SHIFT=,EXTCLK2_DIVIDE_BY=,EXTCLK2_DUTY_CYCLE=,EXTCLK2_MULTIPLY_BY=,EXTCLK2_PHASE_SHIFT=,EXTCLK3_DIVIDE_BY=,EXTCLK3_DUTY_CYCLE=,EXTCLK3_MULTIPLY_BY=,EXTCLK3_PHASE_SHIFT=,FEEDBACK_SOURCE=,GATE_LOCK_COUNTER=,GATE
instancePathKey="Qsys"
kind="Qsys"
version="1.0"
name="Qsys">
<parameter name="AUTO_CLK_CLOCK_RATE" value="-1" />
<parameter name="AUTO_GENERATION_ID" value="1617092314" />
<parameter name="AUTO_DEVICE" value="10M50DAF484C7G" />
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
<parameter name="AUTO_CLK_RESET_DOMAIN" value="-1" />
<parameter name="AUTO_CLK_CLOCK_DOMAIN" value="-1" />
<parameter name="AUTO_UNIQUE_ID" value="" />
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="7" />
<generatedFiles>
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/Qsys.v"
type="VERILOG" />
</generatedFiles>
<childGeneratedFiles>
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path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/F_VCM.v"
type="VERILOG"
attributes="" />
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path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/I2C_VCM_Config.v"
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attributes="" />
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path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/I2C_VCM_Controller.v"
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<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/TERASIC_AUTO_FOCUS.v"
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attributes="TOP_LEVEL_FILE" />
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<file
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<file
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<file
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<file
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<file
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<file
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<file
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<file
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<file
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<file
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<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_sync_generation.v"
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<file
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<file
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<file
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<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0.ocp"
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<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Info">Inserting clock-crossing logic between rsp_demux_005.src0 and rsp_mux.sink5</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message
level="Debug"
culprit="com_altera_sopcmodel_transforms_avalon_ClockCrossingTransform"><![CDATA[After transform: <b>114</b> modules, <b>499</b> connections]]></message>
<message level="Debug">Transform: PipelineTransform</message>
<message level="Debug">Transform: SpotPipelineTransform</message>
<message level="Debug">Transform: PerformanceMonitorTransform</message>
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
<message level="Debug" culprit="limiter_update_transform"><![CDATA[After transform: <b>114</b> modules, <b>501</b> connections]]></message>
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Debug" culprit="merlin_clock_and_reset_bridge_transform"><![CDATA[After transform: <b>119</b> modules, <b>621</b> connections]]></message>
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
<message level="Debug">Transform: HierarchyTransform</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>20</b> modules, <b>85</b> connections]]></message>
<message level="Debug">Transform: InitialInterconnectTransform</message>
<message level="Debug" culprit="merlin_initial_interconnect_transform"><![CDATA[After transform: <b>5</b> modules, <b>8</b> connections]]></message>
<message level="Debug">Transform: TerminalIdAssignmentUpdateTransform</message>
<message level="Debug">Transform: DefaultSlaveTransform</message>
<message level="Debug">Transform: TranslatorTransform</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Debug" culprit="merlin_translator_transform"><![CDATA[After transform: <b>8</b> modules, <b>20</b> connections]]></message>
<message level="Debug">Transform: IDPadTransform</message>
<message level="Debug">Transform: DomainTransform</message>
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces alt_vip_vfb_0.read_master and alt_vip_vfb_0_read_master_translator.avalon_anti_master_0</message>
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces alt_vip_vfb_0.write_master and alt_vip_vfb_0_write_master_translator.avalon_anti_master_0</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Debug">Transform merlin_domain_transform not run on matched interfaces sdram_s1_translator.avalon_anti_slave_0 and sdram.s1</message>
<message level="Debug" culprit="merlin_domain_transform"><![CDATA[After transform: <b>14</b> modules, <b>55</b> connections]]></message>
<message level="Debug">Transform: RouterTransform</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Debug" culprit="merlin_router_transform"><![CDATA[After transform: <b>17</b> modules, <b>67</b> connections]]></message>
<message level="Debug">Transform: TrafficLimiterTransform</message>
<message level="Debug">Transform: BurstTransform</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Debug" culprit="merlin_burst_transform"><![CDATA[After transform: <b>18</b> modules, <b>71</b> connections]]></message>
<message level="Debug">Transform: TreeTransform</message>
<message level="Debug">Transform: NetworkToSwitchTransform</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Debug" culprit="merlin_network_to_switch_transform"><![CDATA[After transform: <b>23</b> modules, <b>84</b> connections]]></message>
<message level="Debug">Transform: WidthTransform</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Debug" culprit="merlin_width_transform"><![CDATA[After transform: <b>25</b> modules, <b>92</b> connections]]></message>
<message level="Debug">Transform: RouterTableTransform</message>
<message level="Debug">Transform: ThreadIDMappingTableTransform</message>
<message level="Debug">Transform: ClockCrossingTransform</message>
<message level="Debug">Transform: PipelineTransform</message>
<message level="Debug">Transform: SpotPipelineTransform</message>
<message level="Debug">Transform: PerformanceMonitorTransform</message>
<message level="Debug">Transform: TrafficLimiterUpdateTransform</message>
<message level="Debug">Transform: InsertClockAndResetBridgesTransform</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Debug" culprit="merlin_clock_and_reset_bridge_transform"><![CDATA[After transform: <b>27</b> modules, <b>116</b> connections]]></message>
<message level="Debug">Transform: InterconnectConnectionsTagger</message>
<message level="Debug">Transform: HierarchyTransform</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Debug" culprit="merlin_hierarchy_transform"><![CDATA[After transform: <b>21</b> modules, <b>89</b> connections]]></message>
<message level="Debug" culprit="merlin_mm_transform"><![CDATA[After transform: <b>21</b> modules, <b>89</b> connections]]></message>
<message level="Debug">Transform: InterruptMapperTransform</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Debug" culprit="merlin_interrupt_mapper_transform"><![CDATA[After transform: <b>22</b> modules, <b>93</b> connections]]></message>
<message level="Debug">Transform: InterruptSyncTransform</message>
<message level="Debug">Transform: InterruptFanoutTransform</message>
<message level="Debug">Transform: AvalonStreamingTransform</message>
<message level="Debug">Transform: ResetAdaptation</message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Progress" culprit="min"></message>
<message level="Progress" culprit="max"></message>
<message level="Progress" culprit="current"></message>
<message level="Debug" culprit="reset_adaptation_transform"><![CDATA[After transform: <b>26</b> modules, <b>93</b> connections]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>TERASIC_AUTO_FOCUS</b> "<b>submodules/TERASIC_AUTO_FOCUS</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>TERASIC_CAMERA</b> "<b>submodules/TERASIC_CAMERA</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>alt_vip_itc</b> "<b>submodules/alt_vipitc131_IS2Vid</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>alt_vip_vfb</b> "<b>submodules/Qsys_alt_vip_vfb_0</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altpll</b> "<b>submodules/Qsys_altpll_0</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>i2c_opencores</b> "<b>submodules/i2c_opencores</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>i2c_opencores</b> "<b>submodules/i2c_opencores</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_jtag_uart</b> "<b>submodules/Qsys_jtag_uart</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_pio</b> "<b>submodules/Qsys_key</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_pio</b> "<b>submodules/Qsys_led</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_pio</b> "<b>submodules/Qsys_mipi_pwdn_n</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_pio</b> "<b>submodules/Qsys_mipi_pwdn_n</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_nios2_gen2</b> "<b>submodules/Qsys_nios2_gen2</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_onchip_memory2</b> "<b>submodules/Qsys_onchip_memory2_0</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_new_sdram_controller</b> "<b>submodules/Qsys_sdram</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_pio</b> "<b>submodules/Qsys_sw</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_sysid_qsys</b> "<b>submodules/Qsys_sysid_qsys</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_avalon_timer</b> "<b>submodules/Qsys_timer</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_mm_interconnect</b> "<b>submodules/Qsys_mm_interconnect_0</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_mm_interconnect</b> "<b>submodules/Qsys_mm_interconnect_1</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_irq_mapper</b> "<b>submodules/Qsys_irq_mapper</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_reset_controller</b> "<b>submodules/altera_reset_controller</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_reset_controller</b> "<b>submodules/altera_reset_controller</b>"]]></message>
<message level="Debug" culprit="Qsys"><![CDATA["<b>Qsys</b>" reuses <b>altera_reset_controller</b> "<b>submodules/altera_reset_controller</b>"]]></message>
<message level="Debug" culprit="Qsys">queue size: 23 starting:TERASIC_AUTO_FOCUS "submodules/TERASIC_AUTO_FOCUS"</message>
<message level="Info" culprit="TERASIC_AUTO_FOCUS_0"><![CDATA["<b>Qsys</b>" instantiated <b>TERASIC_AUTO_FOCUS</b> "<b>TERASIC_AUTO_FOCUS_0</b>"]]></message>
<message level="Debug" culprit="Qsys">queue size: 22 starting:TERASIC_CAMERA "submodules/TERASIC_CAMERA"</message>
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
<message level="Debug">Command: /home/ed/altera_lite/16.0/quartus/linux64/quartus_sh -t /tmp/alt8716_2763057626446894966.dir/0009_sopcqmap/not_a_project_setup.tcl</message>
<message level="Debug">Command: /home/ed/altera_lite/16.0/quartus/linux64/quartus_map not_a_project --generate_hdl_interface=/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=/tmp/alt8716_2763057626446894966.dir/0009_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on</message>
<message level="Debug">Command took 0.601s</message>
<message level="Debug">Command took 0.919s</message>
<message level="Info" culprit="TERASIC_CAMERA_0"><![CDATA["<b>Qsys</b>" instantiated <b>TERASIC_CAMERA</b> "<b>TERASIC_CAMERA_0</b>"]]></message>
<message level="Debug" culprit="Qsys">queue size: 21 starting:alt_vip_itc "submodules/alt_vipitc131_IS2Vid"</message>
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
<message level="Debug">Command: /home/ed/altera_lite/16.0/quartus/linux64/quartus_sh -t /tmp/alt8716_2763057626446894966.dir/0012_sopcqmap/not_a_project_setup.tcl</message>
<message level="Debug">Command: /home/ed/altera_lite/16.0/quartus/linux64/quartus_map not_a_project --generate_hdl_interface=/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=/tmp/alt8716_2763057626446894966.dir/0012_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on</message>
<message level="Debug">Command took 0.544s</message>
<message level="Debug">Command took 0.880s</message>
<message level="Info" culprit="alt_vip_itc_0"><![CDATA["<b>Qsys</b>" instantiated <b>alt_vip_itc</b> "<b>alt_vip_itc_0</b>"]]></message>
<message level="Debug" culprit="Qsys">queue size: 20 starting:alt_vip_vfb "submodules/Qsys_alt_vip_vfb_0"</message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_st_input</b> "<b>submodules/alt_cusp160_avalon_st_input</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_st_output</b> "<b>submodules/alt_cusp160_avalon_st_output</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_mm_bursting_master_fifo</b> "<b>submodules/alt_cusp160_avalon_mm_bursting_master_fifo</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_pulling_width_adapter</b> "<b>submodules/alt_cusp160_pulling_width_adapter</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_mm_bursting_master_fifo</b> "<b>submodules/alt_cusp160_avalon_mm_bursting_master_fifo</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_pushing_width_adapter</b> "<b>submodules/alt_cusp160_pushing_width_adapter</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_pc</b> "<b>submodules/alt_cusp160_pc</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_pc</b> "<b>submodules/alt_cusp160_pc</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="dut"><![CDATA["<b>dut</b>" reuses <b>alt_cusp_testbench_clock</b> "<b>submodules/alt_cusp160_clock_reset</b>"]]></message>
<message level="Debug" culprit="dut"><![CDATA["<b>dut</b>" reuses <b>alt_vip_vfb</b> "<b>submodules/Qsys_alt_vip_vfb_0</b>"]]></message>
<message level="Info" culprit="alt_vip_vfb_0"><![CDATA["<b>Qsys</b>" instantiated <b>alt_vip_vfb</b> "<b>alt_vip_vfb_0</b>"]]></message>
<message level="Debug" culprit="Qsys">queue size: 218 starting:altpll "submodules/Qsys_altpll_0"</message>
<message level="Info" culprit="altpll_0"><![CDATA[Error while generating Qsys_altpll_0.v : 1 : Illegal port or parameter name scandone
Illegal port or parameter name scanclkena
Illegal port or parameter name scandataout
Illegal port or parameter name configupdate
Illegal port or parameter name scandata
child process exited abnormally]]></message>
<message level="Info" culprit="altpll_0"><![CDATA[Illegal port or parameter name scandone
Illegal port or parameter name scanclkena
Illegal port or parameter name scandataout
Illegal port or parameter name configupdate
Illegal port or parameter name scandata
child process exited abnormally
while executing
"exec /home/ed/altera_lite/16.0/quartus/linux64/clearbox altpll_avalon device_family=MAX10 CBX_FILE=Qsys_altpll_0.v -f cbxcmdln_1617092322619640"
("eval" body line 1)
invoked from within
"eval exec $cbx_cmd "]]></message>
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
<message level="Debug">Command: /home/ed/altera_lite/16.0/quartus/linux64/quartus_map not_a_project --generate_hdl_interface=/tmp/alt8716_2763057626446894966.dir/0017_sopcgen/Qsys_altpll_0.v --source=/tmp/alt8716_2763057626446894966.dir/0017_sopcgen/Qsys_altpll_0.v --set=HDL_INTERFACE_OUTPUT_PATH=/tmp/alt8716_2763057626446894966.dir/0018_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on</message>
<message level="Error">Can't continue processing -- expected file /tmp/alt8716_2763057626446894966.dir/0017_sopcgen/Qsys_altpll_0.v is missing</message>
<message level="Warning">Quartus Prime Generate HDL Interface was unsuccessful. 1 error, 0 warnings</message>
<message level="Error"> Peak virtual memory: 1399 megabytes</message>
<message level="Error"> Processing ended: Tue Mar 30 09:18:43 2021</message>
<message level="Error"> Elapsed time: 00:00:01</message>
<message level="Error"> Total CPU time (on all processors): 00:00:00</message>
<message level="Debug">Command took 0.958s</message>
<message level="Debug">Analyser output file not present: Qsys_altpll_0.v.xml</message>
<message level="Error" culprit="altpll_0"><![CDATA[File <b>/tmp/alt8716_2763057626446894966.dir/0017_sopcgen/Qsys_altpll_0.v</b> written by generation callback did not contain a module called Qsys_altpll_0]]></message>
<message level="Error" culprit="altpll_0">/tmp/alt8716_2763057626446894966.dir/0017_sopcgen/Qsys_altpll_0.v (No such file or directory)</message>
<message level="Info" culprit="altpll_0"><![CDATA["<b>Qsys</b>" instantiated <b>altpll</b> "<b>altpll_0</b>"]]></message>
</messages>
</entity>
<entity
path="submodules/"
parameterizationKey="TERASIC_AUTO_FOCUS:1.0:VIDEO_H=480,VIDEO_W=640"
instancePathKey="Qsys:.:TERASIC_AUTO_FOCUS_0"
kind="TERASIC_AUTO_FOCUS"
version="1.0"
name="TERASIC_AUTO_FOCUS">
<parameter name="VIDEO_W" value="640" />
<parameter name="VIDEO_H" value="480" />
<generatedFiles>
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/F_VCM.v"
type="VERILOG"
attributes="" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/I2C_VCM_Config.v"
type="VERILOG"
attributes="" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/I2C_VCM_Controller.v"
type="VERILOG"
attributes="" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/TERASIC_AUTO_FOCUS.v"
type="VERILOG"
attributes="TOP_LEVEL_FILE" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/VCM_CTRL_P.v"
type="VERILOG"
attributes="" />
</generatedFiles>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_AUTO_FOCUS/TERASIC_AUTO_FOCUS_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="TERASIC_AUTO_FOCUS_0" />
<messages>
<message level="Debug" culprit="Qsys">queue size: 23 starting:TERASIC_AUTO_FOCUS "submodules/TERASIC_AUTO_FOCUS"</message>
<message level="Info" culprit="TERASIC_AUTO_FOCUS_0"><![CDATA["<b>Qsys</b>" instantiated <b>TERASIC_AUTO_FOCUS</b> "<b>TERASIC_AUTO_FOCUS_0</b>"]]></message>
</messages>
</entity>
<entity
path="submodules/"
parameterizationKey="TERASIC_CAMERA:1.0:VIDEO_H=480,VIDEO_W=640"
instancePathKey="Qsys:.:TERASIC_CAMERA_0"
kind="TERASIC_CAMERA"
version="1.0"
name="TERASIC_CAMERA">
<generatedFiles>
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/TERASIC_CAMERA.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/CAMERA_RGB.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/CAMERA_Bayer.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Bayer2RGB.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Bayer_LineBuffer.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/rgb_fifo.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/add2.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/add4.v"
type="VERILOG" />
</generatedFiles>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA_hw.tcl" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/CAMERA_RGB.v" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/CAMERA_Bayer.v" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/Bayer2RGB.v" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/Bayer_LineBuffer.v" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/rgb_fifo.v" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/add2.v" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/add4.v" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="TERASIC_CAMERA_0" />
<messages>
<message level="Debug" culprit="Qsys">queue size: 22 starting:TERASIC_CAMERA "submodules/TERASIC_CAMERA"</message>
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
<message level="Debug">Command: /home/ed/altera_lite/16.0/quartus/linux64/quartus_sh -t /tmp/alt8716_2763057626446894966.dir/0009_sopcqmap/not_a_project_setup.tcl</message>
<message level="Debug">Command: /home/ed/altera_lite/16.0/quartus/linux64/quartus_map not_a_project --generate_hdl_interface=/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/TERASIC_CAMERA/TERASIC_CAMERA.v --set=HDL_INTERFACE_OUTPUT_PATH=/tmp/alt8716_2763057626446894966.dir/0009_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on</message>
<message level="Debug">Command took 0.601s</message>
<message level="Debug">Command took 0.919s</message>
<message level="Info" culprit="TERASIC_CAMERA_0"><![CDATA["<b>Qsys</b>" instantiated <b>TERASIC_CAMERA</b> "<b>TERASIC_CAMERA_0</b>"]]></message>
</messages>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_vip_itc:14.0:ACCEPT_COLOURS_IN_SEQ=0,ANC_LINE=0,AP_LINE=0,BPS=8,CLOCKS_ARE_SAME=0,COLOUR_PLANES_ARE_IN_PARALLEL=1,FAMILY=MAX 10,FIELD0_ANC_LINE=0,FIELD0_V_BACK_PORCH=0,FIELD0_V_BLANK=0,FIELD0_V_FRONT_PORCH=0,FIELD0_V_RISING_EDGE=0,FIELD0_V_SYNC_LENGTH=0,FIFO_DEPTH=640,F_FALLING_EDGE=0,F_RISING_EDGE=0,GENERATE_SYNC=0,H_ACTIVE_PIXELS=640,H_BACK_PORCH=48,H_BLANK=0,H_FRONT_PORCH=16,H_SYNC_LENGTH=96,INTERLACED=0,NO_OF_MODES=1,NUMBER_OF_COLOUR_PLANES=3,STD_WIDTH=1,THRESHOLD=639,USE_CONTROL=0,USE_EMBEDDED_SYNCS=0,V_ACTIVE_LINES=480,V_BACK_PORCH=33,V_BLANK=0,V_FRONT_PORCH=10,V_SYNC_LENGTH=2"
instancePathKey="Qsys:.:alt_vip_itc_0"
kind="alt_vip_itc"
version="14.0"
name="alt_vipitc131_IS2Vid">
<generatedFiles>
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid.sv"
type="SYSTEM_VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_sync_compare.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_calculate_mode.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_control.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_mode_banks.sv"
type="SYSTEM_VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_IS2Vid_statemachine.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_fifo.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_generic_count.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_to_binary.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_sync.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_trigger_sync.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_sync_generation.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_frame_counter.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_common_sample_counter.v"
type="VERILOG" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/alt_vipitc131_cvo.sdc"
type="SDC" />
</generatedFiles>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/alt_vip_itc_hw.tcl" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_sync_compare.v" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_calculate_mode.v" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_control.v" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_mode_banks.sv" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid_statemachine.v" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_fifo.v" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_generic_count.v" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_to_binary.v" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sync.v" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_trigger_sync.v" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sync_generation.v" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_frame_counter.v" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_common_sample_counter.v" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/alt_vipitc131_cvo.sdc" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="alt_vip_itc_0" />
<messages>
<message level="Debug" culprit="Qsys">queue size: 21 starting:alt_vip_itc "submodules/alt_vipitc131_IS2Vid"</message>
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
<message level="Debug">Command: /home/ed/altera_lite/16.0/quartus/linux64/quartus_sh -t /tmp/alt8716_2763057626446894966.dir/0012_sopcqmap/not_a_project_setup.tcl</message>
<message level="Debug">Command: /home/ed/altera_lite/16.0/quartus/linux64/quartus_map not_a_project --generate_hdl_interface=/home/ed/altera_lite/16.0/ip/altera/clocked_video_output/src_hdl/alt_vipitc131_IS2Vid.sv --set=HDL_INTERFACE_OUTPUT_PATH=/tmp/alt8716_2763057626446894966.dir/0012_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on</message>
<message level="Debug">Command took 0.544s</message>
<message level="Debug">Command took 0.880s</message>
<message level="Info" culprit="alt_vip_itc_0"><![CDATA["<b>Qsys</b>" instantiated <b>alt_vip_itc</b> "<b>alt_vip_itc_0</b>"]]></message>
</messages>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_vip_vfb:13.1:AUTO_DEVICE_FAMILY=MAX 10,AUTO_READER_CONTROL_CLOCKS_SAME=0,AUTO_READ_MASTER_CLOCKS_SAME=0,AUTO_READ_MASTER_INTERRUPT_USED_MASK=0,AUTO_READ_MASTER_MAX_READ_LATENCY=2,AUTO_READ_MASTER_NEED_ADDR_WIDTH=27,AUTO_WRITER_CONTROL_CLOCKS_SAME=0,AUTO_WRITE_MASTER_CLOCKS_SAME=0,AUTO_WRITE_MASTER_INTERRUPT_USED_MASK=0,AUTO_WRITE_MASTER_MAX_READ_LATENCY=2,AUTO_WRITE_MASTER_NEED_ADDR_WIDTH=27,PARAMETERISATION=&lt;frameBufferParams&gt;&lt;VFB_NAME&gt;MyFrameBuffer&lt;/VFB_NAME&gt;&lt;VFB_MAX_WIDTH&gt;640&lt;/VFB_MAX_WIDTH&gt;&lt;VFB_MAX_HEIGHT&gt;480&lt;/VFB_MAX_HEIGHT&gt;&lt;VFB_BPS&gt;8&lt;/VFB_BPS&gt;&lt;VFB_CHANNELS_IN_SEQ&gt;1&lt;/VFB_CHANNELS_IN_SEQ&gt;&lt;VFB_CHANNELS_IN_PAR&gt;3&lt;/VFB_CHANNELS_IN_PAR&gt;&lt;VFB_WRITER_RUNTIME_CONTROL&gt;false&lt;/VFB_WRITER_RUNTIME_CONTROL&gt;&lt;VFB_DROP_FRAMES&gt;true&lt;/VFB_DROP_FRAMES&gt;&lt;VFB_READER_RUNTIME_CONTROL&gt;0&lt;/VFB_READER_RUNTIME_CONTROL&gt;&lt;VFB_REPEAT_FRAMES&gt;true&lt;/VFB_REPEAT_FRAMES&gt;&lt;VFB_FRAMEBUFFERS_ADDR&gt;00000000&lt;/VFB_FRAMEBUFFERS_ADDR&gt;&lt;VFB_MEM_PORT_WIDTH&gt;32&lt;/VFB_MEM_PORT_WIDTH&gt;&lt;VFB_MEM_MASTERS_USE_SEPARATE_CLOCK&gt;false&lt;/VFB_MEM_MASTERS_USE_SEPARATE_CLOCK&gt;&lt;VFB_RDATA_FIFO_DEPTH&gt;1024&lt;/VFB_RDATA_FIFO_DEPTH&gt;&lt;VFB_RDATA_BURST_TARGET&gt;4&lt;/VFB_RDATA_BURST_TARGET&gt;&lt;VFB_WDATA_FIFO_DEPTH&gt;1024&lt;/VFB_WDATA_FIFO_DEPTH&gt;&lt;VFB_WDATA_BURST_TARGET&gt;4&lt;/VFB_WDATA_BURST_TARGET&gt;&lt;VFB_MAX_NUMBER_PACKETS&gt;1&lt;/VFB_MAX_NUMBER_PACKETS&gt;&lt;VFB_MAX_SYMBOLS_IN_PACKET&gt;10&lt;/VFB_MAX_SYMBOLS_IN_PACKET&gt;&lt;VFB_INTERLACED_SUPPORT&gt;0&lt;/VFB_INTERLACED_SUPPORT&gt;&lt;VFB_CONTROLLED_DROP_REPEAT&gt;0&lt;/VFB_CONTROLLED_DROP_REPEAT&gt;&lt;VFB_BURST_ALIGNMENT&gt;0&lt;/VFB_BURST_ALIGNMENT&gt;&lt;VFB_DROP_INVALID_FIELDS&gt;false&lt;/VFB_DROP_INVALID_FIELDS&gt;&lt;/frameBufferParams&gt;"
instancePathKey="Qsys:.:alt_vip_vfb_0"
kind="alt_vip_vfb"
version="13.1"
name="Qsys_alt_vip_vfb_0">
<parameter name="AUTO_WRITE_MASTER_CLOCKS_SAME" value="0" />
<parameter name="AUTO_WRITE_MASTER_INTERRUPT_USED_MASK" value="0" />
<parameter name="AUTO_READ_MASTER_MAX_READ_LATENCY" value="2" />
<parameter name="AUTO_READ_MASTER_CLOCKS_SAME" value="0" />
<parameter name="AUTO_WRITE_MASTER_MAX_READ_LATENCY" value="2" />
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
<parameter name="AUTO_WRITER_CONTROL_CLOCKS_SAME" value="0" />
<parameter name="AUTO_READ_MASTER_INTERRUPT_USED_MASK" value="0" />
<parameter name="AUTO_READER_CONTROL_CLOCKS_SAME" value="0" />
<parameter name="AUTO_READ_MASTER_NEED_ADDR_WIDTH" value="27" />
<parameter name="AUTO_WRITE_MASTER_NEED_ADDR_WIDTH" value="27" />
<parameter
name="PARAMETERISATION"
value="&lt;frameBufferParams&gt;&lt;VFB_NAME&gt;MyFrameBuffer&lt;/VFB_NAME&gt;&lt;VFB_MAX_WIDTH&gt;640&lt;/VFB_MAX_WIDTH&gt;&lt;VFB_MAX_HEIGHT&gt;480&lt;/VFB_MAX_HEIGHT&gt;&lt;VFB_BPS&gt;8&lt;/VFB_BPS&gt;&lt;VFB_CHANNELS_IN_SEQ&gt;1&lt;/VFB_CHANNELS_IN_SEQ&gt;&lt;VFB_CHANNELS_IN_PAR&gt;3&lt;/VFB_CHANNELS_IN_PAR&gt;&lt;VFB_WRITER_RUNTIME_CONTROL&gt;false&lt;/VFB_WRITER_RUNTIME_CONTROL&gt;&lt;VFB_DROP_FRAMES&gt;true&lt;/VFB_DROP_FRAMES&gt;&lt;VFB_READER_RUNTIME_CONTROL&gt;0&lt;/VFB_READER_RUNTIME_CONTROL&gt;&lt;VFB_REPEAT_FRAMES&gt;true&lt;/VFB_REPEAT_FRAMES&gt;&lt;VFB_FRAMEBUFFERS_ADDR&gt;00000000&lt;/VFB_FRAMEBUFFERS_ADDR&gt;&lt;VFB_MEM_PORT_WIDTH&gt;32&lt;/VFB_MEM_PORT_WIDTH&gt;&lt;VFB_MEM_MASTERS_USE_SEPARATE_CLOCK&gt;false&lt;/VFB_MEM_MASTERS_USE_SEPARATE_CLOCK&gt;&lt;VFB_RDATA_FIFO_DEPTH&gt;1024&lt;/VFB_RDATA_FIFO_DEPTH&gt;&lt;VFB_RDATA_BURST_TARGET&gt;4&lt;/VFB_RDATA_BURST_TARGET&gt;&lt;VFB_WDATA_FIFO_DEPTH&gt;1024&lt;/VFB_WDATA_FIFO_DEPTH&gt;&lt;VFB_WDATA_BURST_TARGET&gt;4&lt;/VFB_WDATA_BURST_TARGET&gt;&lt;VFB_MAX_NUMBER_PACKETS&gt;1&lt;/VFB_MAX_NUMBER_PACKETS&gt;&lt;VFB_MAX_SYMBOLS_IN_PACKET&gt;10&lt;/VFB_MAX_SYMBOLS_IN_PACKET&gt;&lt;VFB_INTERLACED_SUPPORT&gt;0&lt;/VFB_INTERLACED_SUPPORT&gt;&lt;VFB_CONTROLLED_DROP_REPEAT&gt;0&lt;/VFB_CONTROLLED_DROP_REPEAT&gt;&lt;VFB_BURST_ALIGNMENT&gt;0&lt;/VFB_BURST_ALIGNMENT&gt;&lt;VFB_DROP_INVALID_FIELDS&gt;false&lt;/VFB_DROP_INVALID_FIELDS&gt;&lt;/frameBufferParams&gt;" />
<generatedFiles>
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0.ocp"
type="OTHER" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_vfb_writer_vfb_writer.trace"
type="OTHER" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_vfb_reader_vfb_reader.trace"
type="OTHER" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0.vhd"
type="VHDL_ENCRYPT" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_tb.vhd"
type="VHDL" />
</generatedFiles>
<childGeneratedFiles>
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0.ocp"
type="OTHER" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_vfb_writer_vfb_writer.trace"
type="OTHER" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_vfb_reader_vfb_reader.trace"
type="OTHER" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0.vhd"
type="VHDL_ENCRYPT" />
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/Qsys/synthesis/submodules/Qsys_alt_vip_vfb_0_tb.vhd"
type="VHDL" />
</childGeneratedFiles>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/frame_buffer/lib/alt_vip_vfb.cpp" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/frame_buffer/lib/vip_common.h" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/frame_buffer/lib/vip_constants.h" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/frame_buffer/lib/vip_elementclass_info.h" />
<file
path="/home/ed/altera_lite/16.0/ip/altera/frame_buffer/lib/vip_vfb_hwfast.hpp" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/include/alt_cusp.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/alt_cdfg_types.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/alt_cusp_synth.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/alt_exception.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/alt_lib_types.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/alt_util.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_au.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_avalon_eb.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_avalon_mm.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_avalon_st.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_cmp.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_fifo.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_fifo_paged.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_fp_au.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_fp_cmp.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_fp_mult.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_gpio.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_immed.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_mac.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_mem.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_mult.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_multadd.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_reg.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_shift.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/fuLib/alt_tapped_delay.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/simlib/alt_avalon_bus.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/simlib/alt_avalon_eb_channel.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/simlib/alt_avalon_st_channel.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/simlib/alt_debug.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/simlib/alt_exit.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/simlib/alt_overlay.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/include/cusp/simlib/alt_pc.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/assert.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/c++io.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/char_traits.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/ieeefp.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/limits.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/cassert" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/cctype" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/climits" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/cstddef" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/cstdio" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/cstdlib" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/cstring" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/ctype.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/exception" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/fstream" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/iosfwd" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/iostream" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/math.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/memory" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/new" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/pthread.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/sstream" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stdarg.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stddef.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stdexcept" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stdio.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stdlib.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/string" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/string.h" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/typeinfo" />
<file path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/vector" />
<file
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<file
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<file
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<file
path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stlport/config/stl_confix.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stlport/config/stl_cusp.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stlport/config/stlcomp.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stlport/cstddef" />
<file
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<file
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<file
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<file
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<file
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<file
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<file
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<file
path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stlport/set" />
<file
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<file
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<file
path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stlport/stddef.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stlport/stdexcept" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stlport/stdio.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stlport/stdlib.h" />
<file
path="/home/ed/altera_lite/16.0/quartus/cusp/synthinclude/stlport/stl/_algobase.c" />
<file
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<instantiator instantiator="Qsys" as="alt_vip_vfb_0" />
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="dut" />
<messages>
<message level="Debug" culprit="Qsys">queue size: 20 starting:alt_vip_vfb "submodules/Qsys_alt_vip_vfb_0"</message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_st_input</b> "<b>submodules/alt_cusp160_avalon_st_input</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_st_output</b> "<b>submodules/alt_cusp160_avalon_st_output</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_mm_bursting_master_fifo</b> "<b>submodules/alt_cusp160_avalon_mm_bursting_master_fifo</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_pulling_width_adapter</b> "<b>submodules/alt_cusp160_pulling_width_adapter</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_avalon_mm_bursting_master_fifo</b> "<b>submodules/alt_cusp160_avalon_mm_bursting_master_fifo</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_pushing_width_adapter</b> "<b>submodules/alt_cusp160_pushing_width_adapter</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_pc</b> "<b>submodules/alt_cusp160_pc</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxhot16</b> "<b>submodules/alt_cusp160_muxhot16</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_pc</b> "<b>submodules/alt_cusp160_pc</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cusp_muxbin2</b> "<b>submodules/alt_cusp160_muxbin2</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_au</b> "<b>submodules/alt_cusp160_au</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_cmp</b> "<b>submodules/alt_cusp160_cmp</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="alt_vip_vfb_0"><![CDATA["<b>alt_vip_vfb_0</b>" reuses <b>alt_reg</b> "<b>submodules/alt_cusp160_reg</b>"]]></message>
<message level="Debug" culprit="dut"><![CDATA["<b>dut</b>" reuses <b>alt_cusp_testbench_clock</b> "<b>submodules/alt_cusp160_clock_reset</b>"]]></message>
<message level="Debug" culprit="dut"><![CDATA["<b>dut</b>" reuses <b>alt_vip_vfb</b> "<b>submodules/Qsys_alt_vip_vfb_0</b>"]]></message>
<message level="Info" culprit="alt_vip_vfb_0"><![CDATA["<b>Qsys</b>" instantiated <b>alt_vip_vfb</b> "<b>alt_vip_vfb_0</b>"]]></message>
</messages>
</entity>
<entity
path="submodules/"
parameterizationKey="altpll:16.0:AUTO_DEVICE_FAMILY=MAX 10,AUTO_INCLK_INTERFACE_CLOCK_RATE=50000000,AVALON_USE_SEPARATE_SYSCLK=NO,BANDWIDTH=,BANDWIDTH_TYPE=AUTO,CLK0_DIVIDE_BY=1,CLK0_DUTY_CYCLE=50,CLK0_MULTIPLY_BY=2,CLK0_PHASE_SHIFT=0,CLK1_DIVIDE_BY=1,CLK1_DUTY_CYCLE=50,CLK1_MULTIPLY_BY=2,CLK1_PHASE_SHIFT=7500,CLK2_DIVIDE_BY=1,CLK2_DUTY_CYCLE=50,CLK2_MULTIPLY_BY=2,CLK2_PHASE_SHIFT=0,CLK3_DIVIDE_BY=2,CLK3_DUTY_CYCLE=50,CLK3_MULTIPLY_BY=1,CLK3_PHASE_SHIFT=0,CLK4_DIVIDE_BY=5,CLK4_DUTY_CYCLE=50,CLK4_MULTIPLY_BY=2,CLK4_PHASE_SHIFT=0,CLK5_DIVIDE_BY=,CLK5_DUTY_CYCLE=,CLK5_MULTIPLY_BY=,CLK5_PHASE_SHIFT=,CLK6_DIVIDE_BY=,CLK6_DUTY_CYCLE=,CLK6_MULTIPLY_BY=,CLK6_PHASE_SHIFT=,CLK7_DIVIDE_BY=,CLK7_DUTY_CYCLE=,CLK7_MULTIPLY_BY=,CLK7_PHASE_SHIFT=,CLK8_DIVIDE_BY=,CLK8_DUTY_CYCLE=,CLK8_MULTIPLY_BY=,CLK8_PHASE_SHIFT=,CLK9_DIVIDE_BY=,CLK9_DUTY_CYCLE=,CLK9_MULTIPLY_BY=,CLK9_PHASE_SHIFT=,COMPENSATE_CLOCK=CLK0,DOWN_SPREAD=,DPA_DIVIDER=,DPA_DIVIDE_BY=,DPA_MULTIPLY_BY=,ENABLE_SWITCH_OVER_COUNTER=,EXTCLK0_DIVIDE_BY=,EXTCLK0_DUTY_CYCLE=,EXTCLK0_MULTIPLY_BY=,EXTCLK0_PHASE_SHIFT=,EXTCLK1_DIVIDE_BY=,EXTCLK1_DUTY_CYCLE=,EXTCLK1_MULTIPLY_BY=,EXTCLK1_PHASE_SHIFT=,EXTCLK2_DIVIDE_BY=,EXTCLK2_DUTY_CYCLE=,EXTCLK2_MULTIPLY_BY=,EXTCLK2_PHASE_SHIFT=,EXTCLK3_DIVIDE_BY=,EXTCLK3_DUTY_CYCLE=,EXTCLK3_MULTIPLY_BY=,EXTCLK3_PHASE_SHIFT=,FEEDBACK_SOURCE=,GATE_LOCK_COUNTER=,GATE_LOCK_SIGNAL=,HIDDEN_CONSTANTS=CT#CLK2_DIVIDE_BY 1 CT#PORT_clk5 PORT_UNUSED CT#PORT_clk4 PORT_USED CT#PORT_clk3 PORT_USED CT#PORT_clk2 PORT_USED CT#PORT_clk1 PORT_USED CT#PORT_clk0 PORT_USED CT#CLK0_MULTIPLY_BY 2 CT#PORT_SCANWRITE PORT_UNUSED CT#PORT_SCANACLR PORT_UNUSED CT#PORT_PFDENA PORT_UNUSED CT#CLK3_DUTY_CYCLE 50 CT#CLK3_DIVIDE_BY 2 CT#PORT_PLLENA PORT_UNUSED CT#PORT_SCANDATA PORT_UNUSED CT#CLK3_PHASE_SHIFT 0 CT#PORT_SCANCLKENA PORT_UNUSED CT#CLK4_DIVIDE_BY 5 CT#WIDTH_CLOCK 5 CT#PORT_SCANDATAOUT PORT_UNUSED CT#CLK4_MULTIPLY_BY 2 CT#LPM_TYPE altpll CT#PLL_TYPE AUTO CT#CLK0_PHASE_SHIFT 0 CT#CLK1_DUTY_CYCLE 50 CT#PORT_PHASEDONE PORT_UNUSED CT#OPERATION_MODE NORMAL CT#PORT_CONFIGUPDATE PORT_UNUSED CT#CLK1_MULTIPLY_BY 2 CT#COMPENSATE_CLOCK CLK0 CT#PORT_CLKSWITCH PORT_UNUSED CT#CLK4_PHASE_SHIFT 0 CT#INCLK0_INPUT_FREQUENCY 20000 CT#CLK4_DUTY_CYCLE 50 CT#PORT_SCANDONE PORT_UNUSED CT#PORT_CLKLOSS PORT_UNUSED CT#PORT_INCLK1 PORT_UNUSED CT#AVALON_USE_SEPARATE_SYSCLK NO CT#PORT_INCLK0 PORT_USED CT#PORT_clkena5 PORT_UNUSED CT#PORT_clkena4 PORT_UNUSED CT#PORT_clkena3 PORT_UNUSED CT#PORT_clkena2 PORT_UNUSED CT#PORT_clkena1 PORT_UNUSED CT#PORT_clkena0 PORT_UNUSED CT#CLK1_PHASE_SHIFT 7500 CT#PORT_ARESET PORT_USED CT#BANDWIDTH_TYPE AUTO CT#CLK2_MULTIPLY_BY 2 CT#INTENDED_DEVICE_FAMILY {MAX 10} CT#PORT_SCANREAD PORT_UNUSED CT#CLK2_DUTY_CYCLE 50 CT#PORT_PHASESTEP PORT_UNUSED CT#PORT_SCANCLK PORT_UNUSED CT#PORT_CLKBAD1 PORT_UNUSED CT#PORT_CLKBAD0 PORT_UNUSED CT#PORT_FBIN PORT_UNUSED CT#PORT_PHASEUPDOWN PORT_UNUSED CT#PORT_extclk3 PORT_UNUSED CT#PORT_extclk2 PORT_UNUSED CT#PORT_extclk1 PORT_UNUSED CT#PORT_PHASECOUNTERSELECT PORT_UNUSED CT#PORT_extclk0 PORT_UNUSED CT#PORT_ACTIVECLOCK PORT_UNUSED CT#CLK2_PHASE_SHIFT 0 CT#CLK0_DUTY_CYCLE 50 CT#CLK0_DIVIDE_BY 1 CT#CLK1_DIVIDE_BY 1 CT#CLK3_MULTIPLY_BY 1 CT#PORT_LOCKED PORT_USED,HIDDEN_CUSTOM_ELABORATION=altpll_avalon_elaboration,HIDDEN_CUSTOM_POST_EDIT=altpll_avalon_post_edit,HIDDEN_IF_PORTS=IF#phasecounterselect {input 3} IF#locked {output 0} IF#reset {input 0} IF#clk {input 0} IF#phaseupdown {input 0} IF#scandone {output 0} IF#readdata {output 32} IF#write {input 0} IF#scanclk {input 0} IF#phasedone {output 0} IF#c4 {output 0} IF#c3 {output 0} IF#address {input 2} IF#c2 {output 0} IF#c1 {output 0} IF#c0 {output 0} IF#writedata {input 32} IF#read {input 0} IF#areset {input 0} IF#scanclkena {input 0} IF#scandataout {output 0} IF#configupdate {input 0} IF#phasestep {input 0} IF#scandata {input 0},HIDDEN_IS_FIRST_EDIT=0,HIDDEN_IS_NUMERIC=IN#WIDTH_CLOCK 1 IN#CLK0_DUTY_CYCLE 1 IN#CLK2_DIVIDE_BY 1 IN#PLL_TARGET_HARCOPY_CHECK 1 IN#CLK3_DIVIDE_BY 1 IN#CLK4_MULTIPLY_BY 1 IN#CLK1_MULTIPLY_BY 1 IN#CLK3_DUTY_CYCLE 1 IN#CLK4_DIVIDE_BY 1 IN#SWITCHOVER_COUNT_EDIT 1 IN#INCLK0_IN
instancePathKey="Qsys:.:altpll_0"
kind="altpll"
version="16.0"
name="Qsys_altpll_0">
<parameter name="CLK3_PHASE_SHIFT" value="0" />
<parameter name="PORT_LOCKED" value="PORT_USED" />
<parameter name="CLK2_PHASE_SHIFT" value="0" />
<parameter name="CLK4_PHASE_SHIFT" value="0" />
<parameter name="CLK5_DUTY_CYCLE" value="" />
<parameter name="PORT_SCANDATAOUT" value="PORT_UNUSED" />
<parameter name="CLK1_PHASE_SHIFT" value="7500" />
<parameter name="CLK5_PHASE_SHIFT" value="" />
<parameter name="HIDDEN_CUSTOM_ELABORATION" value="altpll_avalon_elaboration" />
<parameter name="CLK8_DUTY_CYCLE" value="" />
<parameter name="CLK0_DIVIDE_BY" value="1" />
<parameter name="CLK7_PHASE_SHIFT" value="" />
<parameter name="CLK0_PHASE_SHIFT" value="0" />
<parameter name="CLK6_PHASE_SHIFT" value="" />
<parameter name="CLK8_PHASE_SHIFT" value="" />
<parameter name="PORT_clk8" value="" />
<parameter name="INVALID_LOCK_MULTIPLIER" value="" />
<parameter name="PORT_clk9" value="" />
<parameter name="PORT_clk6" value="" />
<parameter name="PORT_clk7" value="" />
<parameter name="EXTCLK2_DIVIDE_BY" value="" />
<parameter name="PORT_clk4" value="PORT_USED" />
<parameter name="PORT_clk5" value="PORT_UNUSED" />
<parameter name="PORT_clk2" value="PORT_USED" />
<parameter name="EXTCLK3_DUTY_CYCLE" value="" />
<parameter name="PORT_clk3" value="PORT_USED" />
<parameter name="PORT_clk0" value="PORT_USED" />
<parameter name="PORT_clk1" value="PORT_USED" />
<parameter name="INCLK0_INPUT_FREQUENCY" value="20000" />
<parameter name="PORT_extclkena0" value="" />
<parameter name="SKIP_VCO" value="" />
<parameter name="PORT_extclkena1" value="" />
<parameter name="PORT_extclkena2" value="" />
<parameter name="CLK2_DUTY_CYCLE" value="50" />
<parameter name="PORT_extclkena3" value="" />
<parameter name="PORT_CONFIGUPDATE" value="PORT_UNUSED" />
<parameter name="GATE_LOCK_SIGNAL" value="" />
<parameter name="CLK7_DIVIDE_BY" value="" />
<parameter name="CLK8_DIVIDE_BY" value="" />
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
<parameter name="AUTO_INCLK_INTERFACE_CLOCK_RATE" value="50000000" />
<parameter name="PORT_ENABLE1" value="" />
<parameter name="PORT_VCOUNDERRANGE" value="" />
<parameter name="GATE_LOCK_COUNTER" value="" />
<parameter name="ENABLE_SWITCH_OVER_COUNTER" value="" />
<parameter name="SWITCH_OVER_TYPE" value="" />
<parameter name="PORT_ENABLE0" value="" />
<parameter name="EXTCLK3_DIVIDE_BY" value="" />
<parameter name="PORT_SCANACLR" value="PORT_UNUSED" />
<parameter name="CLK1_DIVIDE_BY" value="1" />
<parameter name="CLK9_DIVIDE_BY" value="" />
<parameter name="FEEDBACK_SOURCE" value="" />
<parameter name="CLK1_DUTY_CYCLE" value="50" />
<parameter name="BANDWIDTH_TYPE" value="AUTO" />
<parameter name="SPREAD_FREQUENCY" value="" />
<parameter name="PORT_PLLENA" value="PORT_UNUSED" />
<parameter name="LOCK_HIGH" value="" />
<parameter
name="HIDDEN_USED_PORTS"
value="UP#locked used UP#c4 used UP#c3 used UP#c2 used UP#c1 used UP#c0 used UP#areset used UP#inclk0 used" />
<parameter name="EXTCLK1_DIVIDE_BY" value="" />
<parameter name="DOWN_SPREAD" value="" />
<parameter name="PORT_SCANDONE" value="PORT_UNUSED" />
<parameter name="SWITCH_OVER_ON_LOSSCLK" value="" />
<parameter name="PORT_SCANCLKENA" value="PORT_UNUSED" />
<parameter name="PORT_FBOUT" value="" />
<parameter name="VCO_FREQUENCY_CONTROL" value="" />
<parameter
name="HIDDEN_IF_PORTS"
value="IF#phasecounterselect {input 3} IF#locked {output 0} IF#reset {input 0} IF#clk {input 0} IF#phaseupdown {input 0} IF#scandone {output 0} IF#readdata {output 32} IF#write {input 0} IF#scanclk {input 0} IF#phasedone {output 0} IF#c4 {output 0} IF#c3 {output 0} IF#address {input 2} IF#c2 {output 0} IF#c1 {output 0} IF#c0 {output 0} IF#writedata {input 32} IF#read {input 0} IF#areset {input 0} IF#scanclkena {input 0} IF#scandataout {output 0} IF#configupdate {input 0} IF#phasestep {input 0} IF#scandata {input 0}" />
<parameter
name="HIDDEN_MF_PORTS"
value="MF#areset 1 MF#clk 1 MF#locked 1 MF#inclk 1" />
<parameter name="CLK9_PHASE_SHIFT" value="" />
<parameter name="CLK6_DIVIDE_BY" value="" />
<parameter name="CLK3_DIVIDE_BY" value="2" />
<parameter name="EXTCLK0_MULTIPLY_BY" value="" />
<parameter name="PORT_PHASEUPDOWN" value="PORT_UNUSED" />
<parameter name="BANDWIDTH" value="" />
<parameter name="CLK0_DUTY_CYCLE" value="50" />
<parameter name="WIDTH_CLOCK" value="5" />
<parameter name="EXTCLK1_MULTIPLY_BY" value="" />
<parameter name="VCO_PHASE_SHIFT_STEP" value="" />
<parameter name="PLL_TYPE" value="AUTO" />
<parameter name="EXTCLK2_MULTIPLY_BY" value="" />
<parameter name="EXTCLK3_MULTIPLY_BY" value="" />
<parameter name="CLK4_DIVIDE_BY" value="5" />
<parameter name="PORT_FBIN" value="PORT_UNUSED" />
<parameter name="SWITCH_OVER_ON_GATED_LOCK" value="" />
<parameter name="PORT_PHASECOUNTERSELECT" value="PORT_UNUSED" />
<parameter name="PORT_VCOOVERRANGE" value="" />
<parameter name="DPA_DIVIDE_BY" value="" />
<parameter
name="HIDDEN_PRIVATES"
value="PT#GLOCKED_FEATURE_ENABLED 0 PT#SPREAD_FEATURE_ENABLED 0 PT#BANDWIDTH_FREQ_UNIT MHz PT#CUR_DEDICATED_CLK c0 PT#INCLK0_FREQ_EDIT 50.000 PT#BANDWIDTH_PRESET Low PT#PLL_LVDS_PLL_CHECK 0 PT#BANDWIDTH_USE_PRESET 0 PT#AVALON_USE_SEPARATE_SYSCLK NO PT#OUTPUT_FREQ_UNIT4 MHz PT#OUTPUT_FREQ_UNIT3 MHz PT#PLL_ENHPLL_CHECK 0 PT#OUTPUT_FREQ_UNIT2 MHz PT#OUTPUT_FREQ_UNIT1 MHz PT#OUTPUT_FREQ_UNIT0 MHz PT#PHASE_RECONFIG_FEATURE_ENABLED 1 PT#CREATE_CLKBAD_CHECK 0 PT#CLKSWITCH_CHECK 0 PT#INCLK1_FREQ_EDIT 100.000 PT#NORMAL_MODE_RADIO 1 PT#SRC_SYNCH_COMP_RADIO 0 PT#PLL_ARESET_CHECK 1 PT#LONG_SCAN_RADIO 1 PT#SCAN_FEATURE_ENABLED 1 PT#USE_CLK4 1 PT#USE_CLK3 1 PT#USE_CLK2 1 PT#PHASE_RECONFIG_INPUTS_CHECK 0 PT#USE_CLK1 1 PT#USE_CLK0 1 PT#PRIMARY_CLK_COMBO inclk0 PT#BANDWIDTH 1.000 PT#GLOCKED_COUNTER_EDIT_CHANGED 1 PT#PLL_FASTPLL_CHECK 0 PT#SPREAD_FREQ_UNIT KHz PT#LVDS_PHASE_SHIFT_UNIT4 deg PT#LVDS_PHASE_SHIFT_UNIT3 deg PT#PLL_AUTOPLL_CHECK 1 PT#OUTPUT_FREQ_MODE4 1 PT#LVDS_PHASE_SHIFT_UNIT2 deg PT#OUTPUT_FREQ_MODE3 1 PT#LVDS_PHASE_SHIFT_UNIT1 deg PT#OUTPUT_FREQ_MODE2 1 PT#LVDS_PHASE_SHIFT_UNIT0 deg PT#OUTPUT_FREQ_MODE1 1 PT#SWITCHOVER_FEATURE_ENABLED 0 PT#MIG_DEVICE_SPEED_GRADE Any PT#OUTPUT_FREQ_MODE0 1 PT#BANDWIDTH_FEATURE_ENABLED 1 PT#INCLK0_FREQ_UNIT_COMBO MHz PT#ZERO_DELAY_RADIO 0 PT#OUTPUT_FREQ4 20.00000000 PT#OUTPUT_FREQ3 25.00000000 PT#OUTPUT_FREQ2 100.00000000 PT#OUTPUT_FREQ1 100.00000000 PT#OUTPUT_FREQ0 100.00000000 PT#SHORT_SCAN_RADIO 0 PT#LVDS_MODE_DATA_RATE_DIRTY 0 PT#CUR_FBIN_CLK c0 PT#PLL_ADVANCED_PARAM_CHECK 0 PT#CLKBAD_SWITCHOVER_CHECK 0 PT#PHASE_SHIFT_STEP_ENABLED_CHECK 0 PT#DEVICE_SPEED_GRADE 6 PT#PLL_FBMIMIC_CHECK 0 PT#LVDS_MODE_DATA_RATE {Not Available} PT#PHASE_SHIFT4 0.00000000 PT#LOCKED_OUTPUT_CHECK 1 PT#SPREAD_PERCENT 0.500 PT#PHASE_SHIFT3 0.00000000 PT#DIV_FACTOR4 1 PT#PHASE_SHIFT2 0.00000000 PT#DIV_FACTOR3 1 PT#PHASE_SHIFT1 270.00000000 PT#DIV_FACTOR2 1 PT#PHASE_SHIFT0 0.00000000 PT#DIV_FACTOR1 1 PT#DIV_FACTOR0 1 PT#CNX_NO_COMPENSATE_RADIO 0 PT#USE_CLKENA4 0 PT#USE_CLKENA3 0 PT#USE_CLKENA2 0 PT#USE_CLKENA1 0 PT#USE_CLKENA0 0 PT#CREATE_INCLK1_CHECK 0 PT#GLOCK_COUNTER_EDIT 1048575 PT#INCLK1_FREQ_UNIT_COMBO MHz PT#EFF_OUTPUT_FREQ_VALUE4 20.000000 PT#EFF_OUTPUT_FREQ_VALUE3 25.000000 PT#EFF_OUTPUT_FREQ_VALUE2 100.000000 PT#EFF_OUTPUT_FREQ_VALUE1 100.000000 PT#EFF_OUTPUT_FREQ_VALUE0 100.000000 PT#SPREAD_FREQ 50.000 PT#USE_MIL_SPEED_GRADE 0 PT#EXPLICIT_SWITCHOVER_COUNTER 0 PT#STICKY_CLK4 1 PT#STICKY_CLK3 1 PT#STICKY_CLK2 1 PT#STICKY_CLK1 1 PT#STICKY_CLK0 1 PT#MIRROR_CLK4 0 PT#EXT_FEEDBACK_RADIO 0 PT#MIRROR_CLK3 0 PT#MIRROR_CLK2 0 PT#MIRROR_CLK1 0 PT#SWITCHOVER_COUNT_EDIT 1 PT#MIRROR_CLK0 0 PT#SELF_RESET_LOCK_LOSS 0 PT#PLL_PFDENA_CHECK 0 PT#INT_FEEDBACK__MODE_RADIO 1 PT#INCLK1_FREQ_EDIT_CHANGED 1 PT#SYNTH_WRAPPER_GEN_POSTFIX 0 PT#CLKLOSS_CHECK 0 PT#PHASE_SHIFT_UNIT4 deg PT#PHASE_SHIFT_UNIT3 deg PT#PHASE_SHIFT_UNIT2 deg PT#PHASE_SHIFT_UNIT1 deg PT#PHASE_SHIFT_UNIT0 deg PT#BANDWIDTH_USE_AUTO 1 PT#HAS_MANUAL_SWITCHOVER 1 PT#MULT_FACTOR4 1 PT#MULT_FACTOR3 1 PT#MULT_FACTOR2 1 PT#MULT_FACTOR1 1 PT#MULT_FACTOR0 1 PT#SPREAD_USE 0 PT#GLOCKED_MODE_CHECK 0 PT#DUTY_CYCLE4 50.00000000 PT#DUTY_CYCLE3 50.00000000 PT#DUTY_CYCLE2 50.00000000 PT#SACN_INPUTS_CHECK 0 PT#DUTY_CYCLE1 50.00000000 PT#INTENDED_DEVICE_FAMILY {MAX 10} PT#DUTY_CYCLE0 50.00000000 PT#PLL_TARGET_HARCOPY_CHECK 0 PT#INCLK1_FREQ_UNIT_CHANGED 1 PT#RECONFIG_FILE ALTPLL1472001986172141.mif PT#ACTIVECLK_CHECK 0" />
<parameter name="VCO_DIVIDE_BY" value="" />
<parameter name="CLK3_DUTY_CYCLE" value="50" />
<parameter name="SCAN_CHAIN" value="" />
<parameter name="LOCK_LOW" value="" />
<parameter name="CLK0_MULTIPLY_BY" value="2" />
<parameter name="PORT_SCANWRITE" value="PORT_UNUSED" />
<parameter name="CLK1_MULTIPLY_BY" value="2" />
<parameter name="PORT_SCLKOUT1" value="" />
<parameter
name="HIDDEN_IS_NUMERIC"
value="IN#WIDTH_CLOCK 1 IN#CLK0_DUTY_CYCLE 1 IN#CLK2_DIVIDE_BY 1 IN#PLL_TARGET_HARCOPY_CHECK 1 IN#CLK3_DIVIDE_BY 1 IN#CLK4_MULTIPLY_BY 1 IN#CLK1_MULTIPLY_BY 1 IN#CLK3_DUTY_CYCLE 1 IN#CLK4_DIVIDE_BY 1 IN#SWITCHOVER_COUNT_EDIT 1 IN#INCLK0_INPUT_FREQUENCY 1 IN#PLL_LVDS_PLL_CHECK 1 IN#PLL_AUTOPLL_CHECK 1 IN#PLL_FASTPLL_CHECK 1 IN#CLK1_DUTY_CYCLE 1 IN#PLL_ENHPLL_CHECK 1 IN#CLK2_MULTIPLY_BY 1 IN#DIV_FACTOR4 1 IN#DIV_FACTOR3 1 IN#DIV_FACTOR2 1 IN#DIV_FACTOR1 1 IN#DIV_FACTOR0 1 IN#LVDS_MODE_DATA_RATE_DIRTY 1 IN#CLK4_DUTY_CYCLE 1 IN#GLOCK_COUNTER_EDIT 1 IN#CLK2_DUTY_CYCLE 1 IN#CLK0_DIVIDE_BY 1 IN#CLK3_MULTIPLY_BY 1 IN#MULT_FACTOR4 1 IN#MULT_FACTOR3 1 IN#MULT_FACTOR2 1 IN#MULT_FACTOR1 1 IN#MULT_FACTOR0 1 IN#CLK0_MULTIPLY_BY 1 IN#USE_MIL_SPEED_GRADE 1 IN#CLK1_DIVIDE_BY 1" />
<parameter name="CLK3_MULTIPLY_BY" value="1" />
<parameter name="PORT_CLKLOSS" value="PORT_UNUSED" />
<parameter name="CLK2_MULTIPLY_BY" value="2" />
<parameter name="CLK4_MULTIPLY_BY" value="2" />
<parameter name="PORT_SCLKOUT0" value="" />
<parameter name="PORT_SCANREAD" value="PORT_UNUSED" />
<parameter name="CLK4_DUTY_CYCLE" value="50" />
<parameter name="PORT_clkena0" value="PORT_UNUSED" />
<parameter name="PORT_PHASEDONE" value="PORT_UNUSED" />
<parameter name="PORT_clkena1" value="PORT_UNUSED" />
<parameter name="PORT_clkena2" value="PORT_UNUSED" />
<parameter name="PORT_PFDENA" value="PORT_UNUSED" />
<parameter name="PORT_clkena3" value="PORT_UNUSED" />
<parameter name="PORT_SCANDATA" value="PORT_UNUSED" />
<parameter name="CLK6_MULTIPLY_BY" value="" />
<parameter name="EXTCLK0_DIVIDE_BY" value="" />
<parameter name="CLK5_MULTIPLY_BY" value="" />
<parameter name="INTENDED_DEVICE_FAMILY" value="MAX 10" />
<parameter name="OPERATION_MODE" value="NORMAL" />
<parameter name="EXTCLK2_DUTY_CYCLE" value="" />
<parameter name="WIDTH_PHASECOUNTERSELECT" value="" />
<parameter name="SWITCH_OVER_COUNTER" value="" />
<parameter name="CLK7_MULTIPLY_BY" value="" />
<parameter name="PORT_clkena4" value="PORT_UNUSED" />
<parameter name="PORT_clkena5" value="PORT_UNUSED" />
<parameter name="SCAN_CHAIN_MIF_FILE" value="" />
<parameter name="CLK8_MULTIPLY_BY" value="" />
<parameter name="CLK9_MULTIPLY_BY" value="" />
<parameter name="EXTCLK2_PHASE_SHIFT" value="" />
<parameter name="COMPENSATE_CLOCK" value="CLK0" />
<parameter name="PORT_INCLK0" value="PORT_USED" />
<parameter name="PORT_CLKSWITCH" value="PORT_UNUSED" />
<parameter name="EXTCLK3_PHASE_SHIFT" value="" />
<parameter name="PORT_INCLK1" value="PORT_UNUSED" />
<parameter name="CLK5_DIVIDE_BY" value="" />
<parameter name="CLK9_DUTY_CYCLE" value="" />
<parameter name="CLK6_DUTY_CYCLE" value="" />
<parameter name="DPA_DIVIDER" value="" />
<parameter name="VCO_MULTIPLY_BY" value="" />
<parameter name="EXTCLK1_PHASE_SHIFT" value="" />
<parameter
name="HIDDEN_CONSTANTS"
value="CT#CLK2_DIVIDE_BY 1 CT#PORT_clk5 PORT_UNUSED CT#PORT_clk4 PORT_USED CT#PORT_clk3 PORT_USED CT#PORT_clk2 PORT_USED CT#PORT_clk1 PORT_USED CT#PORT_clk0 PORT_USED CT#CLK0_MULTIPLY_BY 2 CT#PORT_SCANWRITE PORT_UNUSED CT#PORT_SCANACLR PORT_UNUSED CT#PORT_PFDENA PORT_UNUSED CT#CLK3_DUTY_CYCLE 50 CT#CLK3_DIVIDE_BY 2 CT#PORT_PLLENA PORT_UNUSED CT#PORT_SCANDATA PORT_UNUSED CT#CLK3_PHASE_SHIFT 0 CT#PORT_SCANCLKENA PORT_UNUSED CT#CLK4_DIVIDE_BY 5 CT#WIDTH_CLOCK 5 CT#PORT_SCANDATAOUT PORT_UNUSED CT#CLK4_MULTIPLY_BY 2 CT#LPM_TYPE altpll CT#PLL_TYPE AUTO CT#CLK0_PHASE_SHIFT 0 CT#CLK1_DUTY_CYCLE 50 CT#PORT_PHASEDONE PORT_UNUSED CT#OPERATION_MODE NORMAL CT#PORT_CONFIGUPDATE PORT_UNUSED CT#CLK1_MULTIPLY_BY 2 CT#COMPENSATE_CLOCK CLK0 CT#PORT_CLKSWITCH PORT_UNUSED CT#CLK4_PHASE_SHIFT 0 CT#INCLK0_INPUT_FREQUENCY 20000 CT#CLK4_DUTY_CYCLE 50 CT#PORT_SCANDONE PORT_UNUSED CT#PORT_CLKLOSS PORT_UNUSED CT#PORT_INCLK1 PORT_UNUSED CT#AVALON_USE_SEPARATE_SYSCLK NO CT#PORT_INCLK0 PORT_USED CT#PORT_clkena5 PORT_UNUSED CT#PORT_clkena4 PORT_UNUSED CT#PORT_clkena3 PORT_UNUSED CT#PORT_clkena2 PORT_UNUSED CT#PORT_clkena1 PORT_UNUSED CT#PORT_clkena0 PORT_UNUSED CT#CLK1_PHASE_SHIFT 7500 CT#PORT_ARESET PORT_USED CT#BANDWIDTH_TYPE AUTO CT#CLK2_MULTIPLY_BY 2 CT#INTENDED_DEVICE_FAMILY {MAX 10} CT#PORT_SCANREAD PORT_UNUSED CT#CLK2_DUTY_CYCLE 50 CT#PORT_PHASESTEP PORT_UNUSED CT#PORT_SCANCLK PORT_UNUSED CT#PORT_CLKBAD1 PORT_UNUSED CT#PORT_CLKBAD0 PORT_UNUSED CT#PORT_FBIN PORT_UNUSED CT#PORT_PHASEUPDOWN PORT_UNUSED CT#PORT_extclk3 PORT_UNUSED CT#PORT_extclk2 PORT_UNUSED CT#PORT_extclk1 PORT_UNUSED CT#PORT_PHASECOUNTERSELECT PORT_UNUSED CT#PORT_extclk0 PORT_UNUSED CT#PORT_ACTIVECLOCK PORT_UNUSED CT#CLK2_PHASE_SHIFT 0 CT#CLK0_DUTY_CYCLE 50 CT#CLK0_DIVIDE_BY 1 CT#CLK1_DIVIDE_BY 1 CT#CLK3_MULTIPLY_BY 1 CT#PORT_LOCKED PORT_USED" />
<parameter name="EXTCLK0_PHASE_SHIFT" value="" />
<parameter name="AVALON_USE_SEPARATE_SYSCLK" value="NO" />
<parameter name="SELF_RESET_ON_LOSS_LOCK" value="" />
<parameter name="CLK2_DIVIDE_BY" value="1" />
<parameter name="PORT_PHASESTEP" value="PORT_UNUSED" />
<parameter name="USING_FBMIMICBIDIR_PORT" value="" />
<parameter name="PORT_CLKBAD1" value="PORT_UNUSED" />
<parameter name="QUALIFY_CONF_DONE" value="" />
<parameter name="PORT_ARESET" value="PORT_USED" />
<parameter name="DPA_MULTIPLY_BY" value="" />
<parameter name="INCLK1_INPUT_FREQUENCY" value="" />
<parameter name="CLK7_DUTY_CYCLE" value="" />
<parameter name="EXTCLK0_DUTY_CYCLE" value="" />
<parameter name="HIDDEN_CUSTOM_POST_EDIT" value="altpll_avalon_post_edit" />
<parameter name="HIDDEN_IS_FIRST_EDIT" value="0" />
<parameter name="VALID_LOCK_MULTIPLIER" value="" />
<parameter name="PRIMARY_CLOCK" value="" />
<parameter name="SELF_RESET_ON_GATED_LOSS_LOCK" value="" />
<parameter name="SCLKOUT0_PHASE_SHIFT" value="" />
<parameter name="PORT_ACTIVECLOCK" value="PORT_UNUSED" />
<parameter name="PORT_SCANCLK" value="PORT_UNUSED" />
<parameter name="SCLKOUT1_PHASE_SHIFT" value="" />
<parameter name="PORT_extclk3" value="PORT_UNUSED" />
<parameter name="EXTCLK1_DUTY_CYCLE" value="" />
<parameter name="PORT_extclk0" value="PORT_UNUSED" />
<parameter name="PORT_CLKBAD0" value="PORT_UNUSED" />
<parameter name="PORT_extclk2" value="PORT_UNUSED" />
<parameter name="PORT_extclk1" value="PORT_UNUSED" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/sopc_builder_ip/altera_avalon_altpll/altera_avalon_altpll_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="altpll_0" />
<messages>
<message level="Debug" culprit="Qsys">queue size: 218 starting:altpll "submodules/Qsys_altpll_0"</message>
<message level="Info" culprit="altpll_0"><![CDATA[Error while generating Qsys_altpll_0.v : 1 : Illegal port or parameter name scandone
Illegal port or parameter name scanclkena
Illegal port or parameter name scandataout
Illegal port or parameter name configupdate
Illegal port or parameter name scandata
child process exited abnormally]]></message>
<message level="Info" culprit="altpll_0"><![CDATA[Illegal port or parameter name scandone
Illegal port or parameter name scanclkena
Illegal port or parameter name scandataout
Illegal port or parameter name configupdate
Illegal port or parameter name scandata
child process exited abnormally
while executing
"exec /home/ed/altera_lite/16.0/quartus/linux64/clearbox altpll_avalon device_family=MAX10 CBX_FILE=Qsys_altpll_0.v -f cbxcmdln_1617092322619640"
("eval" body line 1)
invoked from within
"eval exec $cbx_cmd "]]></message>
<message level="Debug">set ALTERA_HW_TCL_KEEP_TEMP_FILES=1 to retain temp files</message>
<message level="Debug">Command: /home/ed/altera_lite/16.0/quartus/linux64/quartus_map not_a_project --generate_hdl_interface=/tmp/alt8716_2763057626446894966.dir/0017_sopcgen/Qsys_altpll_0.v --source=/tmp/alt8716_2763057626446894966.dir/0017_sopcgen/Qsys_altpll_0.v --set=HDL_INTERFACE_OUTPUT_PATH=/tmp/alt8716_2763057626446894966.dir/0018_sopcqmap/ --ini=disable_check_quartus_compatibility_qsys_only=on</message>
<message level="Error">Can't continue processing -- expected file /tmp/alt8716_2763057626446894966.dir/0017_sopcgen/Qsys_altpll_0.v is missing</message>
<message level="Warning">Quartus Prime Generate HDL Interface was unsuccessful. 1 error, 0 warnings</message>
<message level="Error"> Peak virtual memory: 1399 megabytes</message>
<message level="Error"> Processing ended: Tue Mar 30 09:18:43 2021</message>
<message level="Error"> Elapsed time: 00:00:01</message>
<message level="Error"> Total CPU time (on all processors): 00:00:00</message>
<message level="Debug">Command took 0.958s</message>
<message level="Debug">Analyser output file not present: Qsys_altpll_0.v.xml</message>
<message level="Error" culprit="altpll_0"><![CDATA[File <b>/tmp/alt8716_2763057626446894966.dir/0017_sopcgen/Qsys_altpll_0.v</b> written by generation callback did not contain a module called Qsys_altpll_0]]></message>
<message level="Error" culprit="altpll_0">/tmp/alt8716_2763057626446894966.dir/0017_sopcgen/Qsys_altpll_0.v (No such file or directory)</message>
<message level="Info" culprit="altpll_0"><![CDATA["<b>Qsys</b>" instantiated <b>altpll</b> "<b>altpll_0</b>"]]></message>
</messages>
</entity>
<entity
path="submodules/"
parameterizationKey="i2c_opencores:12.0:"
instancePathKey="Qsys:.:i2c_opencores_camera"
kind="i2c_opencores"
version="12.0"
name="i2c_opencores">
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/stuff/EEE2Rover/DE10_LITE_D8M_VIP_16/ip/i2c_opencores/i2c_opencores_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="i2c_opencores_camera,i2c_opencores_mipi" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_avalon_jtag_uart:16.0:allowMultipleConnections=false,avalonSpec=2.0,clkFreq=50000000,enableInteractiveInput=false,enableInteractiveOutput=false,hubInstanceID=0,legacySignalAllow=false,readBufferDepth=64,readIRQThreshold=8,simInputCharacterStream=,simInteractiveOptions=NO_INTERACTIVE_WINDOWS,useRegistersForReadBuffer=false,useRegistersForWriteBuffer=false,useRelativePathForSimFile=false,writeBufferDepth=64,writeIRQThreshold=8"
instancePathKey="Qsys:.:jtag_uart"
kind="altera_avalon_jtag_uart"
version="16.0"
name="Qsys_jtag_uart">
<parameter name="readBufferDepth" value="64" />
<parameter name="clkFreq" value="50000000" />
<parameter name="useRelativePathForSimFile" value="false" />
<parameter name="hubInstanceID" value="0" />
<parameter name="enableInteractiveInput" value="false" />
<parameter name="avalonSpec" value="2.0" />
<parameter name="simInputCharacterStream" value="" />
<parameter name="readIRQThreshold" value="8" />
<parameter name="useRegistersForWriteBuffer" value="false" />
<parameter name="useRegistersForReadBuffer" value="false" />
<parameter name="simInteractiveOptions" value="NO_INTERACTIVE_WINDOWS" />
<parameter name="enableInteractiveOutput" value="false" />
<parameter name="writeIRQThreshold" value="8" />
<parameter name="writeBufferDepth" value="64" />
<parameter name="allowMultipleConnections" value="false" />
<parameter name="legacySignalAllow" value="false" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/sopc_builder_ip/altera_avalon_jtag_uart/altera_avalon_jtag_uart_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="jtag_uart" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_avalon_pio:16.0:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=true,derived_has_irq=false,derived_has_out=false,derived_has_tri=false,derived_irq_type=NONE,direction=Input,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=2"
instancePathKey="Qsys:.:key"
kind="altera_avalon_pio"
version="16.0"
name="Qsys_key">
<parameter name="derived_do_test_bench_wiring" value="false" />
<parameter name="generateIRQ" value="false" />
<parameter name="derived_has_irq" value="false" />
<parameter name="captureEdge" value="false" />
<parameter name="clockRate" value="50000000" />
<parameter name="derived_has_out" value="false" />
<parameter name="derived_has_in" value="true" />
<parameter name="resetValue" value="0" />
<parameter name="derived_has_tri" value="false" />
<parameter name="derived_capture" value="false" />
<parameter name="simDoTestBenchWiring" value="false" />
<parameter name="bitModifyingOutReg" value="false" />
<parameter name="simDrivenValue" value="0" />
<parameter name="derived_edge_type" value="NONE" />
<parameter name="irqType" value="LEVEL" />
<parameter name="derived_irq_type" value="NONE" />
<parameter name="edgeType" value="RISING" />
<parameter name="width" value="2" />
<parameter name="bitClearingEdgeCapReg" value="false" />
<parameter name="direction" value="Input" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="key" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_avalon_pio:16.0:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=false,derived_has_irq=false,derived_has_out=true,derived_has_tri=false,derived_irq_type=NONE,direction=Output,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=10"
instancePathKey="Qsys:.:led"
kind="altera_avalon_pio"
version="16.0"
name="Qsys_led">
<parameter name="derived_do_test_bench_wiring" value="false" />
<parameter name="generateIRQ" value="false" />
<parameter name="derived_has_irq" value="false" />
<parameter name="captureEdge" value="false" />
<parameter name="clockRate" value="50000000" />
<parameter name="derived_has_out" value="true" />
<parameter name="derived_has_in" value="false" />
<parameter name="resetValue" value="0" />
<parameter name="derived_has_tri" value="false" />
<parameter name="derived_capture" value="false" />
<parameter name="simDoTestBenchWiring" value="false" />
<parameter name="bitModifyingOutReg" value="false" />
<parameter name="simDrivenValue" value="0" />
<parameter name="derived_edge_type" value="NONE" />
<parameter name="irqType" value="LEVEL" />
<parameter name="derived_irq_type" value="NONE" />
<parameter name="edgeType" value="RISING" />
<parameter name="width" value="10" />
<parameter name="bitClearingEdgeCapReg" value="false" />
<parameter name="direction" value="Output" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="led" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_avalon_pio:16.0:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=false,derived_has_irq=false,derived_has_out=true,derived_has_tri=false,derived_irq_type=NONE,direction=Output,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=1"
instancePathKey="Qsys:.:mipi_pwdn_n"
kind="altera_avalon_pio"
version="16.0"
name="Qsys_mipi_pwdn_n">
<parameter name="derived_do_test_bench_wiring" value="false" />
<parameter name="generateIRQ" value="false" />
<parameter name="derived_has_irq" value="false" />
<parameter name="captureEdge" value="false" />
<parameter name="clockRate" value="50000000" />
<parameter name="derived_has_out" value="true" />
<parameter name="derived_has_in" value="false" />
<parameter name="resetValue" value="0" />
<parameter name="derived_has_tri" value="false" />
<parameter name="derived_capture" value="false" />
<parameter name="simDoTestBenchWiring" value="false" />
<parameter name="bitModifyingOutReg" value="false" />
<parameter name="simDrivenValue" value="0" />
<parameter name="derived_edge_type" value="NONE" />
<parameter name="irqType" value="LEVEL" />
<parameter name="derived_irq_type" value="NONE" />
<parameter name="edgeType" value="RISING" />
<parameter name="width" value="1" />
<parameter name="bitClearingEdgeCapReg" value="false" />
<parameter name="direction" value="Output" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="mipi_pwdn_n,mipi_reset_n" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_nios2_gen2:16.0:AUTO_CLK_CLOCK_DOMAIN=1,AUTO_CLK_RESET_DOMAIN=1,AUTO_DEVICE=10M50DAF484C7G,AUTO_DEVICE_SPEEDGRADE=7,bht_ramBlockType=Automatic,breakAbsoluteAddr=264224,breakOffset=32,breakSlave=None,breakSlave_derived=nios2_gen2.debug_mem_slave,cdx_enabled=false,clockFrequency=50000000,cpuArchRev=1,cpuID=0,cpuReset=false,customInstSlavesSystemInfo=&lt;info/&gt;,customInstSlavesSystemInfo_nios_a=&lt;info/&gt;,customInstSlavesSystemInfo_nios_b=&lt;info/&gt;,customInstSlavesSystemInfo_nios_c=&lt;info/&gt;,dataAddrWidth=19,dataMasterHighPerformanceAddrWidth=1,dataMasterHighPerformanceMapParam=,dataSlaveMapParam=&lt;address-map&gt;&lt;slave name=&apos;onchip_memory2_0.s1&apos; start=&apos;0x20000&apos; end=&apos;0x386A0&apos; type=&apos;altera_avalon_onchip_memory2.s1&apos; /&gt;&lt;slave name=&apos;nios2_gen2.debug_mem_slave&apos; start=&apos;0x40800&apos; end=&apos;0x41000&apos; type=&apos;altera_nios2_gen2.debug_mem_slave&apos; /&gt;&lt;slave name=&apos;timer.s1&apos; start=&apos;0x41000&apos; end=&apos;0x41020&apos; type=&apos;altera_avalon_timer.s1&apos; /&gt;&lt;slave name=&apos;TERASIC_AUTO_FOCUS_0.mm_ctrl&apos; start=&apos;0x41020&apos; end=&apos;0x41040&apos; type=&apos;TERASIC_AUTO_FOCUS.mm_ctrl&apos; /&gt;&lt;slave name=&apos;i2c_opencores_camera.avalon_slave_0&apos; start=&apos;0x41040&apos; end=&apos;0x41060&apos; type=&apos;i2c_opencores.avalon_slave_0&apos; /&gt;&lt;slave name=&apos;i2c_opencores_mipi.avalon_slave_0&apos; start=&apos;0x41060&apos; end=&apos;0x41080&apos; type=&apos;i2c_opencores.avalon_slave_0&apos; /&gt;&lt;slave name=&apos;mipi_pwdn_n.s1&apos; start=&apos;0x41080&apos; end=&apos;0x41090&apos; type=&apos;altera_avalon_pio.s1&apos; /&gt;&lt;slave name=&apos;mipi_reset_n.s1&apos; start=&apos;0x41090&apos; end=&apos;0x410A0&apos; type=&apos;altera_avalon_pio.s1&apos; /&gt;&lt;slave name=&apos;key.s1&apos; start=&apos;0x410A0&apos; end=&apos;0x410B0&apos; type=&apos;altera_avalon_pio.s1&apos; /&gt;&lt;slave name=&apos;sw.s1&apos; start=&apos;0x410B0&apos; end=&apos;0x410C0&apos; type=&apos;altera_avalon_pio.s1&apos; /&gt;&lt;slave name=&apos;led.s1&apos; start=&apos;0x410C0&apos; end=&apos;0x410D0&apos; type=&apos;altera_avalon_pio.s1&apos; /&gt;&lt;slave name=&apos;altpll_0.pll_slave&apos; start=&apos;0x410D0&apos; end=&apos;0x410E0&apos; type=&apos;altpll.pll_slave&apos; /&gt;&lt;slave name=&apos;sysid_qsys.control_slave&apos; start=&apos;0x410E0&apos; end=&apos;0x410E8&apos; type=&apos;altera_avalon_sysid_qsys.control_slave&apos; /&gt;&lt;slave name=&apos;jtag_uart.avalon_jtag_slave&apos; start=&apos;0x410E8&apos; end=&apos;0x410F0&apos; type=&apos;altera_avalon_jtag_uart.avalon_jtag_slave&apos; /&gt;&lt;/address-map&gt;,data_master_high_performance_paddr_base=0,data_master_high_performance_paddr_size=0,data_master_paddr_base=0,data_master_paddr_size=0,dcache_bursts=false,dcache_bursts_derived=false,dcache_lineSize_derived=32,dcache_numTCDM=0,dcache_ramBlockType=Automatic,dcache_size=2048,dcache_size_derived=2048,dcache_tagramBlockType=Automatic,dcache_victim_buf_impl=ram,debug_OCIOnchipTrace=_128,debug_assignJtagInstanceID=false,debug_datatrace=false,debug_datatrigger=0,debug_debugReqSignals=false,debug_enabled=true,debug_hwbreakpoint=0,debug_insttrace=false,debug_jtagInstanceID=0,debug_offchiptrace=false,debug_onchiptrace=false,debug_traceStorage=onchip_trace,debug_traceType=none,debug_triggerArming=true,deviceFamilyName=MAX 10,deviceFeaturesSystemInfo=ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLE
instancePathKey="Qsys:.:nios2_gen2"
kind="altera_nios2_gen2"
version="16.0"
name="Qsys_nios2_gen2">
<parameter name="mpx_enabled" value="false" />
<parameter name="ocimem_ramBlockType" value="Automatic" />
<parameter name="dcache_victim_buf_impl" value="ram" />
<parameter name="setting_exportPCB" value="false" />
<parameter name="setting_ic_ecc_present" value="true" />
<parameter name="dcache_size_derived" value="2048" />
<parameter name="mmu_udtlbNumEntries" value="6" />
<parameter
name="deviceFeaturesSystemInfo"
value="ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMUL
<parameter name="bht_ramBlockType" value="Automatic" />
<parameter name="mmu_TLBMissExcSlave" value="None" />
<parameter name="impl" value="Fast" />
<parameter name="setting_branchpredictiontype" value="Dynamic" />
<parameter name="tightly_coupled_instruction_master_0_paddr_size" value="0" />
<parameter name="breakOffset" value="32" />
<parameter name="setting_activateTrace" value="false" />
<parameter name="debug_offchiptrace" value="false" />
<parameter name="setting_avalonDebugPortPresent" value="false" />
<parameter name="dcache_numTCDM" value="0" />
<parameter name="setting_tmr_output_disable" value="false" />
<parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
<parameter name="tightly_coupled_data_master_2_paddr_base" value="0" />
<parameter name="debug_debugReqSignals" value="false" />
<parameter name="AUTO_DEVICE" value="10M50DAF484C7G" />
<parameter name="instruction_master_high_performance_paddr_size" value="0" />
<parameter name="tightly_coupled_instruction_master_2_paddr_base" value="0" />
<parameter name="mmu_processIDNumBits" value="8" />
<parameter name="debug_onchiptrace" value="false" />
<parameter name="setting_rf_ecc_present" value="true" />
<parameter name="ocimem_ramInit" value="false" />
<parameter name="internalIrqMaskSystemInfo" value="15" />
<parameter name="tightly_coupled_data_master_0_paddr_size" value="0" />
<parameter name="exceptionAbsoluteAddr" value="131104" />
<parameter name="icache_size" value="4096" />
<parameter
name="dataSlaveMapParam"
value="&lt;address-map&gt;&lt;slave name=&apos;onchip_memory2_0.s1&apos; start=&apos;0x20000&apos; end=&apos;0x386A0&apos; type=&apos;altera_avalon_onchip_memory2.s1&apos; /&gt;&lt;slave name=&apos;nios2_gen2.debug_mem_slave&apos; start=&apos;0x40800&apos; end=&apos;0x41000&apos; type=&apos;altera_nios2_gen2.debug_mem_slave&apos; /&gt;&lt;slave name=&apos;timer.s1&apos; start=&apos;0x41000&apos; end=&apos;0x41020&apos; type=&apos;altera_avalon_timer.s1&apos; /&gt;&lt;slave name=&apos;TERASIC_AUTO_FOCUS_0.mm_ctrl&apos; start=&apos;0x41020&apos; end=&apos;0x41040&apos; type=&apos;TERASIC_AUTO_FOCUS.mm_ctrl&apos; /&gt;&lt;slave name=&apos;i2c_opencores_camera.avalon_slave_0&apos; start=&apos;0x41040&apos; end=&apos;0x41060&apos; type=&apos;i2c_opencores.avalon_slave_0&apos; /&gt;&lt;slave name=&apos;i2c_opencores_mipi.avalon_slave_0&apos; start=&apos;0x41060&apos; end=&apos;0x41080&apos; type=&apos;i2c_opencores.avalon_slave_0&apos; /&gt;&lt;slave name=&apos;mipi_pwdn_n.s1&apos; start=&apos;0x41080&apos; end=&apos;0x41090&apos; type=&apos;altera_avalon_pio.s1&apos; /&gt;&lt;slave name=&apos;mipi_reset_n.s1&apos; start=&apos;0x41090&apos; end=&apos;0x410A0&apos; type=&apos;altera_avalon_pio.s1&apos; /&gt;&lt;slave name=&apos;key.s1&apos; start=&apos;0x410A0&apos; end=&apos;0x410B0&apos; type=&apos;altera_avalon_pio.s1&apos; /&gt;&lt;slave name=&apos;sw.s1&apos; start=&apos;0x410B0&apos; end=&apos;0x410C0&apos; type=&apos;altera_avalon_pio.s1&apos; /&gt;&lt;slave name=&apos;led.s1&apos; start=&apos;0x410C0&apos; end=&apos;0x410D0&apos; type=&apos;altera_avalon_pio.s1&apos; /&gt;&lt;slave name=&apos;altpll_0.pll_slave&apos; start=&apos;0x410D0&apos; end=&apos;0x410E0&apos; type=&apos;altpll.pll_slave&apos; /&gt;&lt;slave name=&apos;sysid_qsys.control_slave&apos; start=&apos;0x410E0&apos; end=&apos;0x410E8&apos; type=&apos;altera_avalon_sysid_qsys.control_slave&apos; /&gt;&lt;slave name=&apos;jtag_uart.avalon_jtag_slave&apos; start=&apos;0x410E8&apos; end=&apos;0x410F0&apos; type=&apos;altera_avalon_jtag_uart.avalon_jtag_slave&apos; /&gt;&lt;/address-map&gt;" />
<parameter name="mpu_enabled" value="false" />
<parameter name="flash_instruction_master_paddr_size" value="0" />
<parameter name="setting_ecc_present" value="false" />
<parameter name="stratix_dspblock_shift_mul" value="false" />
<parameter name="shift_rot_impl" value="1" />
<parameter name="setting_ioregionBypassDCache" value="false" />
<parameter name="faAddrWidth" value="1" />
<parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
<parameter name="resetrequest_enabled" value="true" />
<parameter name="exceptionSlave" value="onchip_memory2_0.s1" />
<parameter name="debug_triggerArming" value="true" />
<parameter name="debug_OCIOnchipTrace" value="_128" />
<parameter name="dataAddrWidth" value="19" />
<parameter name="setting_bit31BypassDCache" value="true" />
<parameter name="instAddrWidth" value="19" />
<parameter name="io_regionbase" value="0" />
<parameter name="mul_32_impl" value="2" />
<parameter name="translate_on" value=" &quot;synthesis translate_on&quot; " />
<parameter name="tightly_coupled_instruction_master_1_paddr_base" value="0" />
<parameter name="mmu_autoAssignTlbPtrSz" value="true" />
<parameter name="instruction_master_paddr_base" value="0" />
<parameter name="userDefinedSettings" value="" />
<parameter name="mul_64_impl" value="0" />
<parameter name="clockFrequency" value="50000000" />
<parameter name="resetOffset" value="0" />
<parameter name="dcache_ramBlockType" value="Automatic" />
<parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
<parameter name="mul_shift_choice" value="0" />
<parameter name="tightlyCoupledDataMaster2MapParam" value="" />
<parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
<parameter name="tightly_coupled_data_master_1_paddr_size" value="0" />
<parameter name="setting_asic_third_party_synthesis" value="false" />
<parameter name="mpu_minInstRegionSize" value="12" />
<parameter name="setting_exportdebuginfo" value="false" />
<parameter name="mmu_tlbPtrSz" value="7" />
<parameter name="resetSlave" value="onchip_memory2_0.s1" />
<parameter name="dcache_bursts_derived" value="false" />
<parameter name="multiplierType" value="mul_fast32" />
<parameter name="debug_traceStorage" value="onchip_trace" />
<parameter name="setting_preciseIllegalMemAccessException" value="false" />
<parameter name="fa_cache_linesize" value="0" />
<parameter name="data_master_paddr_size" value="0" />
<parameter name="setting_HBreakTest" value="false" />
<parameter name="setting_disableocitrace" value="false" />
<parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
<parameter name="setting_showInternalSettings" value="false" />
<parameter name="instructionMasterHighPerformanceMapParam" value="" />
<parameter name="tightly_coupled_instruction_master_3_paddr_base" value="0" />
<parameter name="debug_datatrigger" value="0" />
<parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
<parameter name="debug_enabled" value="true" />
<parameter name="setting_export_large_RAMs" value="false" />
<parameter name="setting_dc_ecc_present" value="true" />
<parameter name="dividerType" value="no_div" />
<parameter name="setting_exportvectors" value="false" />
<parameter name="breakSlave_derived" value="nios2_gen2.debug_mem_slave" />
<parameter name="tightly_coupled_data_master_0_paddr_base" value="0" />
<parameter name="mmu_ramBlockType" value="Automatic" />
<parameter name="cdx_enabled" value="false" />
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="7" />
<parameter name="customInstSlavesSystemInfo" value="&lt;info/&gt;" />
<parameter name="tracefilename" value="" />
<parameter name="instructionMasterHighPerformanceAddrWidth" value="1" />
<parameter name="tightly_coupled_instruction_master_2_paddr_size" value="0" />
<parameter name="setting_oci_version" value="1" />
<parameter name="icache_burstType" value="None" />
<parameter name="data_master_high_performance_paddr_size" value="0" />
<parameter name="setting_disable_tmr_inj" value="false" />
<parameter name="instruction_master_high_performance_paddr_base" value="0" />
<parameter name="tightly_coupled_instruction_master_3_paddr_size" value="0" />
<parameter name="regfile_ramBlockType" value="Automatic" />
<parameter name="dcache_size" value="2048" />
<parameter name="breakSlave" value="None" />
<parameter name="exceptionOffset" value="32" />
<parameter name="tightlyCoupledDataMaster0MapParam" value="" />
<parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
<parameter name="breakAbsoluteAddr" value="264224" />
<parameter name="setting_ecc_sim_test_ports" value="false" />
<parameter name="setting_showUnpublishedSettings" value="false" />
<parameter name="master_addr_map" value="false" />
<parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
<parameter name="resetAbsoluteAddr" value="131072" />
<parameter name="cpuArchRev" value="1" />
<parameter name="setting_dtcm_ecc_present" value="true" />
<parameter name="customInstSlavesSystemInfo_nios_c" value="&lt;info/&gt;" />
<parameter name="customInstSlavesSystemInfo_nios_b" value="&lt;info/&gt;" />
<parameter name="customInstSlavesSystemInfo_nios_a" value="&lt;info/&gt;" />
<parameter name="setting_interruptControllerType" value="Internal" />
<parameter name="dcache_tagramBlockType" value="Automatic" />
<parameter name="debug_insttrace" value="false" />
<parameter name="setting_itcm_ecc_present" value="true" />
<parameter name="tightly_coupled_instruction_master_0_paddr_base" value="0" />
<parameter name="mmu_TLBMissExcAbsAddr" value="0" />
<parameter name="mpu_useLimit" value="false" />
<parameter name="icache_numTCIM" value="0" />
<parameter name="setting_usedesignware" value="false" />
<parameter name="tightlyCoupledDataMaster3MapParam" value="" />
<parameter name="instruction_master_paddr_size" value="0" />
<parameter name="mmu_TLBMissExcOffset" value="0" />
<parameter name="mmu_enabled" value="false" />
<parameter name="mmu_uitlbNumEntries" value="4" />
<parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
<parameter name="setting_activateTestEndChecker" value="false" />
<parameter name="cpuID" value="0" />
<parameter name="tightly_coupled_data_master_2_paddr_size" value="0" />
<parameter name="setting_asic_enabled" value="false" />
<parameter name="setting_HDLSimCachesCleared" value="true" />
<parameter name="setting_asic_add_scan_mode_input" value="false" />
<parameter name="setting_shadowRegisterSets" value="0" />
<parameter name="tightly_coupled_data_master_3_paddr_size" value="0" />
<parameter name="icache_ramBlockType" value="Automatic" />
<parameter name="faSlaveMapParam" value="" />
<parameter name="setting_clearXBitsLDNonBypass" value="true" />
<parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
<parameter name="fa_cache_line" value="2" />
<parameter name="debug_assignJtagInstanceID" value="false" />
<parameter name="setting_activateMonitors" value="true" />
<parameter name="AUTO_CLK_RESET_DOMAIN" value="1" />
<parameter name="setting_allow_break_inst" value="false" />
<parameter name="io_regionsize" value="0" />
<parameter name="tightly_coupled_data_master_3_paddr_base" value="0" />
<parameter name="translate_off" value=" &quot;synthesis translate_off&quot; " />
<parameter name="mpu_numOfInstRegion" value="8" />
<parameter name="flash_instruction_master_paddr_base" value="0" />
<parameter name="cpuReset" value="false" />
<parameter name="setting_removeRAMinit" value="false" />
<parameter name="icache_tagramBlockType" value="Automatic" />
<parameter name="setting_mmu_ecc_present" value="true" />
<parameter name="AUTO_CLK_CLOCK_DOMAIN" value="1" />
<parameter name="debug_datatrace" value="false" />
<parameter name="debug_hwbreakpoint" value="0" />
<parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
<parameter name="dataMasterHighPerformanceMapParam" value="" />
<parameter name="setting_bigEndian" value="false" />
<parameter name="mpu_minDataRegionSize" value="12" />
<parameter name="tightly_coupled_data_master_1_paddr_base" value="0" />
<parameter name="debug_jtagInstanceID" value="0" />
<parameter name="setting_breakslaveoveride" value="false" />
<parameter name="debug_traceType" value="none" />
<parameter name="setting_alwaysEncrypt" value="true" />
<parameter name="setting_oci_export_jtag_signals" value="false" />
<parameter name="dcache_lineSize_derived" value="32" />
<parameter name="deviceFamilyName" value="MAX 10" />
<parameter name="tightlyCoupledDataMaster1MapParam" value="" />
<parameter name="setting_support31bitdcachebypass" value="true" />
<parameter
name="instSlaveMapParam"
value="&lt;address-map&gt;&lt;slave name=&apos;onchip_memory2_0.s1&apos; start=&apos;0x20000&apos; end=&apos;0x386A0&apos; type=&apos;altera_avalon_onchip_memory2.s1&apos; /&gt;&lt;slave name=&apos;nios2_gen2.debug_mem_slave&apos; start=&apos;0x40800&apos; end=&apos;0x41000&apos; type=&apos;altera_nios2_gen2.debug_mem_slave&apos; /&gt;&lt;/address-map&gt;" />
<parameter name="setting_bhtPtrSz" value="8" />
<parameter name="setting_exportHostDebugPort" value="false" />
<parameter name="tmr_enabled" value="false" />
<parameter name="data_master_paddr_base" value="0" />
<parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
<parameter name="mpu_numOfDataRegion" value="8" />
<parameter name="data_master_high_performance_paddr_base" value="0" />
<parameter name="tightly_coupled_instruction_master_1_paddr_size" value="0" />
<parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
<parameter name="dcache_bursts" value="false" />
<parameter name="setting_asic_synopsys_translate_on_off" value="false" />
<parameter name="setting_fast_register_read" value="false" />
<parameter name="mmu_tlbNumWays" value="16" />
<parameter name="shifterType" value="fast_le_shift" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/nios2_ip/altera_nios2_gen2/altera_nios2_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="nios2_gen2" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_avalon_onchip_memory2:16.0:allowInSystemMemoryContentEditor=false,autoInitializationFileName=Qsys_onchip_memory2_0,blockType=AUTO,copyInitFile=false,dataWidth=32,dataWidth2=32,derived_gui_ram_block_type=Automatic,derived_init_file_name=Qsys_onchip_memory2_0.hex,derived_is_hardcopy=false,derived_set_addr_width=15,derived_set_addr_width2=15,derived_set_data_width=32,derived_set_data_width2=32,deviceFamily=MAX 10,deviceFeatures=ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_P
instancePathKey="Qsys:.:onchip_memory2_0"
kind="altera_avalon_onchip_memory2"
version="16.0"
name="Qsys_onchip_memory2_0">
<parameter name="derived_is_hardcopy" value="false" />
<parameter
name="deviceFeatures"
value="ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PHYSICAL_DESIGN_PLANNER 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMUL
<parameter name="autoInitializationFileName" value="Qsys_onchip_memory2_0" />
<parameter name="derived_gui_ram_block_type" value="Automatic" />
<parameter name="useShallowMemBlocks" value="false" />
<parameter name="writable" value="true" />
<parameter name="dualPort" value="false" />
<parameter name="derived_set_addr_width2" value="15" />
<parameter name="dataWidth" value="32" />
<parameter name="allowInSystemMemoryContentEditor" value="false" />
<parameter name="derived_set_addr_width" value="15" />
<parameter name="derived_init_file_name" value="Qsys_onchip_memory2_0.hex" />
<parameter name="initializationFileName" value="onchip_mem.hex" />
<parameter name="singleClockOperation" value="false" />
<parameter name="derived_set_data_width2" value="32" />
<parameter name="readDuringWriteMode" value="DONT_CARE" />
<parameter name="blockType" value="AUTO" />
<parameter name="useNonDefaultInitFile" value="false" />
<parameter name="resetrequest_enabled" value="true" />
<parameter name="simMemInitOnlyFilename" value="0" />
<parameter name="copyInitFile" value="false" />
<parameter name="deviceFamily" value="MAX 10" />
<parameter name="simAllowMRAMContentsFile" value="false" />
<parameter name="ecc_enabled" value="false" />
<parameter name="derived_set_data_width" value="32" />
<parameter name="instanceID" value="NONE" />
<parameter name="memorySize" value="100000" />
<parameter name="dataWidth2" value="32" />
<parameter name="enableDiffWidth" value="false" />
<parameter name="initMemContent" value="false" />
<parameter name="slave1Latency" value="1" />
<parameter name="slave2Latency" value="1" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/sopc_builder_ip/altera_avalon_onchip_memory2/altera_avalon_onchip_memory2_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="onchip_memory2_0" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_avalon_new_sdram_controller:16.0:TAC=5.5,TMRD=3,TRCD=20.0,TRFC=70.0,TRP=20.0,TWR=14.0,addressWidth=25,bankWidth=2,casLatency=3,clockRate=100000000,columnWidth=10,componentName=Qsys_sdram,dataWidth=16,generateSimulationModel=true,initNOPDelay=0.0,initRefreshCommands=2,masteredTristateBridgeSlave=0,model=single_Micron_MT48LC4M32B2_7_chip,numberOfBanks=4,numberOfChipSelects=1,pinsSharedViaTriState=false,powerUpDelay=100.0,refreshPeriod=15.625,registerDataIn=true,rowWidth=13,size=67108864"
instancePathKey="Qsys:.:sdram"
kind="altera_avalon_new_sdram_controller"
version="16.0"
name="Qsys_sdram">
<parameter name="registerDataIn" value="true" />
<parameter name="casLatency" value="3" />
<parameter name="refreshPeriod" value="15.625" />
<parameter name="masteredTristateBridgeSlave" value="0" />
<parameter name="TMRD" value="3" />
<parameter name="pinsSharedViaTriState" value="false" />
<parameter name="clockRate" value="100000000" />
<parameter name="TRP" value="20.0" />
<parameter name="numberOfChipSelects" value="1" />
<parameter name="columnWidth" value="10" />
<parameter name="componentName" value="Qsys_sdram" />
<parameter name="TRFC" value="70.0" />
<parameter name="generateSimulationModel" value="true" />
<parameter name="dataWidth" value="16" />
<parameter name="rowWidth" value="13" />
<parameter name="bankWidth" value="2" />
<parameter name="powerUpDelay" value="100.0" />
<parameter name="TWR" value="14.0" />
<parameter name="size" value="67108864" />
<parameter name="TAC" value="5.5" />
<parameter name="initRefreshCommands" value="2" />
<parameter name="TRCD" value="20.0" />
<parameter name="initNOPDelay" value="0.0" />
<parameter name="addressWidth" value="25" />
<parameter name="numberOfBanks" value="4" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/sopc_builder_ip/altera_avalon_new_sdram_controller/altera_avalon_new_sdram_controller_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="sdram" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_avalon_pio:16.0:bitClearingEdgeCapReg=false,bitModifyingOutReg=false,captureEdge=false,clockRate=50000000,derived_capture=false,derived_do_test_bench_wiring=false,derived_edge_type=NONE,derived_has_in=true,derived_has_irq=false,derived_has_out=false,derived_has_tri=false,derived_irq_type=NONE,direction=Input,edgeType=RISING,generateIRQ=false,irqType=LEVEL,resetValue=0,simDoTestBenchWiring=false,simDrivenValue=0,width=10"
instancePathKey="Qsys:.:sw"
kind="altera_avalon_pio"
version="16.0"
name="Qsys_sw">
<parameter name="derived_do_test_bench_wiring" value="false" />
<parameter name="generateIRQ" value="false" />
<parameter name="derived_has_irq" value="false" />
<parameter name="captureEdge" value="false" />
<parameter name="clockRate" value="50000000" />
<parameter name="derived_has_out" value="false" />
<parameter name="derived_has_in" value="true" />
<parameter name="resetValue" value="0" />
<parameter name="derived_has_tri" value="false" />
<parameter name="derived_capture" value="false" />
<parameter name="simDoTestBenchWiring" value="false" />
<parameter name="bitModifyingOutReg" value="false" />
<parameter name="simDrivenValue" value="0" />
<parameter name="derived_edge_type" value="NONE" />
<parameter name="irqType" value="LEVEL" />
<parameter name="derived_irq_type" value="NONE" />
<parameter name="edgeType" value="RISING" />
<parameter name="width" value="10" />
<parameter name="bitClearingEdgeCapReg" value="false" />
<parameter name="direction" value="Input" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/sopc_builder_ip/altera_avalon_pio/altera_avalon_pio_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="sw" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_avalon_sysid_qsys:16.0:id=0,timestamp=1617092314"
instancePathKey="Qsys:.:sysid_qsys"
kind="altera_avalon_sysid_qsys"
version="16.0"
name="Qsys_sysid_qsys">
<parameter name="id" value="0" />
<parameter name="timestamp" value="1617092314" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/sopc_builder_ip/altera_avalon_sysid_qsys/altera_avalon_sysid_qsys_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="sysid_qsys" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_avalon_timer:16.0:alwaysRun=false,counterSize=32,fixedPeriod=false,loadValue=49999,mult=0.001,period=1,periodUnits=MSEC,periodUnitsString=ms,resetOutput=false,slave_address_width=3,snapshot=true,systemFrequency=50000000,ticksPerSec=1000.0,timeoutPulseOutput=false,timerPreset=FULL_FEATURED,valueInSecond=0.001,watchdogPulse=2"
instancePathKey="Qsys:.:timer"
kind="altera_avalon_timer"
version="16.0"
name="Qsys_timer">
<parameter name="loadValue" value="49999" />
<parameter name="timeoutPulseOutput" value="false" />
<parameter name="period" value="1" />
<parameter name="periodUnitsString" value="ms" />
<parameter name="mult" value="0.001" />
<parameter name="ticksPerSec" value="1000.0" />
<parameter name="systemFrequency" value="50000000" />
<parameter name="alwaysRun" value="false" />
<parameter name="valueInSecond" value="0.001" />
<parameter name="fixedPeriod" value="false" />
<parameter name="counterSize" value="32" />
<parameter name="periodUnits" value="MSEC" />
<parameter name="watchdogPulse" value="2" />
<parameter name="slave_address_width" value="3" />
<parameter name="resetOutput" value="false" />
<parameter name="snapshot" value="true" />
<parameter name="timerPreset" value="FULL_FEATURED" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/sopc_builder_ip/altera_avalon_timer/altera_avalon_timer_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="timer" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_mm_interconnect:16.0:AUTO_DEVICE=10M50DAF484C7G,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=,COMPOSE_CONTENTS=add_instance {nios2_gen2_data_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READDATA} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READ} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WRITE} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_LOCK} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BURSTBOUNDARIES} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ALWAYSBURS
&lt;address_map&gt;
&lt;slave
id=&quot;4&quot;
name=&quot;jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410e8&quot;
end=&quot;0x000000000000410f0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;3&quot;
name=&quot;i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041060&quot;
end=&quot;0x00000000000041080&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;2&quot;
name=&quot;i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041040&quot;
end=&quot;0x00000000000041060&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;12&quot;
name=&quot;sysid_qsys_control_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410e0&quot;
end=&quot;0x000000000000410e8&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;9&quot;
name=&quot;nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000040800&quot;
end=&quot;0x00000000000041000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;0&quot;
name=&quot;TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041020&quot;
end=&quot;0x00000000000041040&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;1&quot;
name=&quot;altpll_0_pll_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410d0&quot;
end=&quot;0x000000000000410e0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;10&quot;
name=&quot;onchip_memory2_0_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000020000&quot;
end=&quot;0x00000000000040000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;13&quot;
name=&quot;timer_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041000&quot;
end=&quot;0x00000000000041020&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;6&quot;
name=&quot;led_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410c0&quot;
end=&quot;0x000000000000410d0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;11&quot;
name=&quot;sw_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410b0&quot;
end=&quot;0x000000000000410c0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;5&quot;
name=&quot;key_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410a0&quot;
end=&quot;0x000000000000410b0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;8&quot;
name=&quot;mipi_reset_n_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041090&quot;
end=&quot;0x000000000000410a0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;7&quot;
name=&quot;mipi_pwdn_n_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041080&quot;
end=&quot;0x00000000000041090&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {nios2_gen2_data_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {ID} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {BURSTWRAP_VALUE} {7};set_instance_parameter_value {nios2_gen2_data_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {nios2_gen2_data_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {USE_WRITERESPONSE} {0};add_instance {nios2_gen2_instruction_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_QOS_H} {75};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_QOS_L} {75};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_SIDEBAND_H} {73};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_SIDEBAND_L} {73};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_SIDEBAND_H} {72};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_SIDEBAND_L} {72};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_TYPE_H} {71};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_TYPE_L} {70};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_CACHE_H} {91};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_CACHE_L} {88};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_THREAD_ID_H} {84};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_THREAD_ID_L} {84};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_EXCLUSIVE} {60};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_SRC_ID_H} {79};set_instance_paramet
&lt;address_map&gt;
&lt;slave
id=&quot;10&quot;
name=&quot;onchip_memory2_0_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000020000&quot;
end=&quot;0x00000000000040000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;9&quot;
name=&quot;nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000040800&quot;
end=&quot;0x00000000000041000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {ID} {1};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {BURSTWRAP_VALUE} {3};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {USE_WRITERESPONSE} {0};add_instance {jtag_uart_avalon_jtag_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_CHANNEL_W} {14};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(5
&lt;address_map&gt;
&lt;slave
id=&quot;4&quot;
name=&quot;jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410e8&quot;
end=&quot;0x000000000000410f0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;3&quot;
name=&quot;i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041060&quot;
end=&quot;0x00000000000041080&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;2&quot;
name=&quot;i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041040&quot;
end=&quot;0x00000000000041060&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;12&quot;
name=&quot;sysid_qsys_control_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410e0&quot;
end=&quot;0x000000000000410e8&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;9&quot;
name=&quot;nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000040800&quot;
end=&quot;0x00000000000041000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;0&quot;
name=&quot;TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041020&quot;
end=&quot;0x00000000000041040&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;1&quot;
name=&quot;altpll_0_pll_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410d0&quot;
end=&quot;0x000000000000410e0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;10&quot;
name=&quot;onchip_memory2_0_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000020000&quot;
end=&quot;0x00000000000040000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;13&quot;
name=&quot;timer_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041000&quot;
end=&quot;0x00000000000041020&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;6&quot;
name=&quot;led_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410c0&quot;
end=&quot;0x000000000000410d0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;11&quot;
name=&quot;sw_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410b0&quot;
end=&quot;0x000000000000410c0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;5&quot;
name=&quot;key_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410a0&quot;
end=&quot;0x000000000000410b0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;8&quot;
name=&quot;mipi_reset_n_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041090&quot;
end=&quot;0x000000000000410a0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;7&quot;
name=&quot;mipi_pwdn_n_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041080&quot;
end=&quot;0x00000000000041090&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
,AV_BURSTBOUNDARIES=1,AV_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,BURSTWRAP_VALUE=7,CACHE_VALUE=0,ID=0,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_ADDR_SIDEBAND_H=72,PKT_ADDR_SIDEBAND_L=72,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BURST_TYPE_H=71,PKT_BURST_TYPE_L=70,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_CACHE_H=91,PKT_CACHE_L=88,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DATA_SIDEBAND_H=73,PKT_DATA_SIDEBAND_L=73,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_QOS_H=75,PKT_QOS_L=75,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_THREAD_ID_H=84,PKT_THREAD_ID_L=84,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_EXCLUSIVE=60,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURE_ACCESS_BIT=1,ST_CHANNEL_W=14,ST_DATA_W=97,SUPPRESS_0_BYTEEN_RSP=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_merlin_master_agent:16.0:ADDR_MAP=&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;
&lt;address_map&gt;
&lt;slave
id=&quot;10&quot;
name=&quot;onchip_memory2_0_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000020000&quot;
end=&quot;0x00000000000040000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;9&quot;
name=&quot;nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000040800&quot;
end=&quot;0x00000000000041000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=1,BURSTWRAP_VALUE=3,CACHE_VALUE=0,ID=1,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_ADDR_SIDEBAND_H=72,PKT_ADDR_SIDEBAND_L=72,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BURST_TYPE_H=71,PKT_BURST_TYPE_L=70,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_CACHE_H=91,PKT_CACHE_L=88,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DATA_SIDEBAND_H=73,PKT_DATA_SIDEBAND_L=73,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_QOS_H=75,PKT_QOS_L=75,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_THREAD_ID_H=84,PKT_THREAD_ID_L=84,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_EXCLUSIVE=60,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,SECURE_ACCESS_BIT=1,ST_CHANNEL_W=14,ST_DATA_W=97,SUPPRESS_0_BYTEEN_RSP=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_merlin_slave_agent:16.0:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=4,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=14,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.0:BITS_PER_SYMBOL=98,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=2,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_merlin_slave_agent:16.0:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=3,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=3,MAX_BURSTWRAP=7,MAX_BYTE_CNT=4,MERLIN_PACKET_FORMAT=ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(56) trans_compressed_read(55) addr(54:36) byteen(35:32) data(31:0),PKT_ADDR_H=54,PKT_ADDR_L=36,PKT_BEGIN_BURST=74,PKT_BURSTWRAP_H=66,PKT_BURSTWRAP_L=64,PKT_BURST_SIZE_H=69,PKT_BURST_SIZE_L=67,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=63,PKT_BYTE_CNT_L=61,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DEST_ID_H=83,PKT_DEST_ID_L=80,PKT_ORI_BURST_SIZE_H=96,PKT_ORI_BURST_SIZE_L=94,PKT_PROTECTION_H=87,PKT_PROTECTION_L=85,PKT_RESPONSE_STATUS_H=93,PKT_RESPONSE_STATUS_L=92,PKT_SRC_ID_H=79,PKT_SRC_ID_L=76,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=55,PKT_TRANS_LOCK=59,PKT_TRANS_POSTED=56,PKT_TRANS_READ=58,PKT_TRANS_WRITE=57,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=14,ST_DATA_W=97,SUPPRESS_0_BYTEEN_CMD=0,U
instancePathKey="Qsys:.:mm_interconnect_0"
kind="altera_mm_interconnect"
version="16.0"
name="Qsys_mm_interconnect_0">
<parameter name="AUTO_DEVICE" value="10M50DAF484C7G" />
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="" />
<parameter
name="COMPOSE_CONTENTS"
value="add_instance {nios2_gen2_data_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BURSTCOUNT_W} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_ADDRESS_W} {19};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_BURSTCOUNT_W} {3};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READDATA} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WRITEDATA} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READ} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WRITE} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BYTEENABLE} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_BURSTCOUNT} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_DEBUGACCESS} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_LOCK} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BURSTBOUNDARIES} {1};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {AV_ALWAYSBURSTMAXBURST} {0};set_instance_parameter_value {nios2_gen2_data_master_translator} {SYNC_RESET} {0};add_instance {nios2_gen2_instruction_
&lt;address_map&gt;
&lt;slave
id=&quot;4&quot;
name=&quot;jtag_uart_avalon_jtag_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410e8&quot;
end=&quot;0x000000000000410f0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;3&quot;
name=&quot;i2c_opencores_mipi_avalon_slave_0_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041060&quot;
end=&quot;0x00000000000041080&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;2&quot;
name=&quot;i2c_opencores_camera_avalon_slave_0_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041040&quot;
end=&quot;0x00000000000041060&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;12&quot;
name=&quot;sysid_qsys_control_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410e0&quot;
end=&quot;0x000000000000410e8&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;9&quot;
name=&quot;nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000040800&quot;
end=&quot;0x00000000000041000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;0&quot;
name=&quot;TERASIC_AUTO_FOCUS_0_mm_ctrl_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041020&quot;
end=&quot;0x00000000000041040&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;1&quot;
name=&quot;altpll_0_pll_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410d0&quot;
end=&quot;0x000000000000410e0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;10&quot;
name=&quot;onchip_memory2_0_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000020000&quot;
end=&quot;0x00000000000040000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;13&quot;
name=&quot;timer_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041000&quot;
end=&quot;0x00000000000041020&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;6&quot;
name=&quot;led_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410c0&quot;
end=&quot;0x000000000000410d0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;11&quot;
name=&quot;sw_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410b0&quot;
end=&quot;0x000000000000410c0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;5&quot;
name=&quot;key_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x00000000000410a0&quot;
end=&quot;0x000000000000410b0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;8&quot;
name=&quot;mipi_reset_n_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041090&quot;
end=&quot;0x000000000000410a0&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;7&quot;
name=&quot;mipi_pwdn_n_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000041080&quot;
end=&quot;0x00000000000041090&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {nios2_gen2_data_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {ID} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {BURSTWRAP_VALUE} {7};set_instance_parameter_value {nios2_gen2_data_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {nios2_gen2_data_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_data_master_agent} {USE_WRITERESPONSE} {0};add_instance {nios2_gen2_instruction_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_QOS_H} {75};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_QOS_L} {75};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_SIDEBAND_H} {73};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_SIDEBAND_L} {73};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_SIDEBAND_H} {72};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_SIDEBAND_L} {72};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_TYPE_H} {71};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_TYPE_L} {70};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_CACHE_H} {91};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_CACHE_L} {88};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_THREAD_ID_H} {84};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_THREAD_ID_L} {84};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_EXCLUSIVE} {60};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {PKT_SRC_ID_H} {79};set_instance_paramet
&lt;address_map&gt;
&lt;slave
id=&quot;10&quot;
name=&quot;onchip_memory2_0_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000020000&quot;
end=&quot;0x00000000000040000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;slave
id=&quot;9&quot;
name=&quot;nios2_gen2_debug_mem_slave_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000000040800&quot;
end=&quot;0x00000000000041000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {ID} {1};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {BURSTWRAP_VALUE} {3};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {nios2_gen2_instruction_master_agent} {USE_WRITERESPONSE} {0};add_instance {jtag_uart_avalon_jtag_slave_agent} {altera_merlin_slave_agent};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_H} {96};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ORI_BURST_SIZE_L} {94};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_H} {93};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_RESPONSE_STATUS_L} {92};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_H} {69};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURST_SIZE_L} {67};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_LOCK} {59};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BEGIN_BURST} {74};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_H} {87};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_PROTECTION_L} {85};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_H} {66};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BURSTWRAP_L} {64};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_H} {63};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTE_CNT_L} {61};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_H} {54};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_COMPRESSED_READ} {55};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_POSTED} {56};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_WRITE} {57};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_TRANS_READ} {58};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_H} {31};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DATA_L} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_H} {79};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SRC_ID_L} {76};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_H} {83};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_DEST_ID_L} {80};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_CHANNEL_W} {14};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {ST_DATA_W} {97};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AVS_BURSTCOUNT_W} {3};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {jtag_uart_avalon_jtag_slave_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(96:94) response_status(93:92) cache(91:88) protection(87:85) thread_id(84) dest_id(83:80) src_id(79:76) qos(75) begin_burst(74) data_sideband(73) addr_sideband(72) burst_type(71:70) burst_size(69:67) burstwrap(66:64) byte_cnt(63:61) trans_exclusive(60) trans_lock(59) trans_read(58) trans_write(57) trans_posted(5
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="mm_interconnect_0" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_mm_interconnect:16.0:AUTO_DEVICE=10M50DAF484C7G,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=,COMPOSE_CONTENTS=add_instance {alt_vip_vfb_0_read_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ADDRESS_W} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_ADDRESS_W} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_BURSTCOUNT_W} {5};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READDATA} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READ} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WRITE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_LOCK} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {alt_vip_vfb_0_read
&lt;address_map&gt;
&lt;slave
id=&quot;0&quot;
name=&quot;sdram_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000004000000&quot;
end=&quot;0x00000000008000000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {ID} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {BURSTWRAP_VALUE} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {USE_WRITERESPONSE} {0};add_instance {alt_vip_vfb_0_write_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ORI_BURST_SIZE_H} {103};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ORI_BURST_SIZE_L} {101};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_RESPONSE_STATUS_H} {100};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_RESPONSE_STATUS_L} {99};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_QOS_H} {88};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_QOS_L} {88};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_SIDEBAND_H} {86};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_SIDEBAND_L} {86};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_SIDEBAND_H} {85};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_SIDEBAND_L} {85};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_TYPE_H} {84};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_TYPE_L} {83};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_CACHE_H} {98};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_CACHE_L} {95};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_THREAD_ID_H} {91};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_THREAD_ID_L} {91};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_SIZE_H} {82};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_SIZE_L} {80};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BEGIN_BURST} {87};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_PROTECTION_H} {94};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_PROTECTION_L} {92};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURSTWRAP_H} {79};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURSTWRAP_L} {79};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTE_CNT_H} {78};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTE_CNT_L} {74};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_H} {67};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_POSTED} {69};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_READ} {71};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_SRC_ID_H} {89};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_SRC_ID_L} {89};set_instance_parameter_value
&lt;address_map&gt;
&lt;slave
id=&quot;0&quot;
name=&quot;sdram_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000004000000&quot;
end=&quot;0x00000000008000000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {ID} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {BURSTWRAP_VALUE} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {USE_WRITERESPONSE} {0};add_instance {sdram_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sdram_s1_agent} {PKT_ORI_BURST_SIZE_H} {85};set_instance_parameter_value {sdram_s1_agent} {PKT_ORI_BURST_SIZE_L} {83};set_instance_parameter_value {sdram_s1_agent} {PKT_RESPONSE_STATUS_H} {82};set_instance_parameter_value {sdram_s1_agent} {PKT_RESPONSE_STATUS_L} {81};set_instance_parameter_value {sdram_s1_agent} {PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_agent} {PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_LOCK} {54};set_instance_parameter_value {sdram_s1_agent} {PKT_BEGIN_BURST} {69};set_instance_parameter_value {sdram_s1_agent} {PKT_PROTECTION_H} {76};set_instance_parameter_value {sdram_s1_agent} {PKT_PROTECTION_L} {74};set_instance_parameter_value {sdram_s1_agent} {PKT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_agent} {PKT_BURSTWRAP_L} {61};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_agent} {PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_agent} {PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_POSTED} {51};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_WRITE} {52};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_READ} {53};set_instance_parameter_value {sdram_s1_agent} {PKT_DATA_H} {15};set_instance_parameter_value {sdram_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_agent} {PKT_SRC_ID_H} {71};set_instance_parameter_value {sdram_s1_agent} {PKT_SRC_ID_L} {71};set_instance_parameter_value {sdram_s1_agent} {PKT_DEST_ID_H} {72};set_instance_parameter_value {sdram_s1_agent} {PKT_DEST_ID_L} {72};set_instance_parameter_value {sdram_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sdram_s1_agent} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_agent} {ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sdram_s1_agent} {AVS_BURSTCOUNT_W} {2};set_instance_parameter_value {sdram_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sdram_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {1};set_instance_parameter_value {sdram_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sdram_s1_agent} {MAX_BYTE_CNT} {2};set_instance_parameter_value {sdram_s1_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {sdram_s1_agent} {ID} {0};set_instance_parameter_value {sdram_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sdram_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sdram_s1_agent} {ECC_ENABLE} {0};add_instance {sdram_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sdram_s1_agent_rsp_
&lt;address_map&gt;
&lt;slave
id=&quot;0&quot;
name=&quot;sdram_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000004000000&quot;
end=&quot;0x00000000008000000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_W=5,AV_LINEWRAPBURSTS=0,BURSTWRAP_VALUE=1,CACHE_VALUE=0,ID=0,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),PKT_ADDR_H=67,PKT_ADDR_L=36,PKT_ADDR_SIDEBAND_H=85,PKT_ADDR_SIDEBAND_L=85,PKT_BEGIN_BURST=87,PKT_BURSTWRAP_H=79,PKT_BURSTWRAP_L=79,PKT_BURST_SIZE_H=82,PKT_BURST_SIZE_L=80,PKT_BURST_TYPE_H=84,PKT_BURST_TYPE_L=83,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=78,PKT_BYTE_CNT_L=74,PKT_CACHE_H=98,PKT_CACHE_L=95,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DATA_SIDEBAND_H=86,PKT_DATA_SIDEBAND_L=86,PKT_DEST_ID_H=90,PKT_DEST_ID_L=90,PKT_ORI_BURST_SIZE_H=103,PKT_ORI_BURST_SIZE_L=101,PKT_PROTECTION_H=94,PKT_PROTECTION_L=92,PKT_QOS_H=88,PKT_QOS_L=88,PKT_RESPONSE_STATUS_H=100,PKT_RESPONSE_STATUS_L=99,PKT_SRC_ID_H=89,PKT_SRC_ID_L=89,PKT_THREAD_ID_H=91,PKT_THREAD_ID_L=91,PKT_TRANS_COMPRESSED_READ=68,PKT_TRANS_EXCLUSIVE=73,PKT_TRANS_LOCK=72,PKT_TRANS_POSTED=69,PKT_TRANS_READ=71,PKT_TRANS_WRITE=70,SECURE_ACCESS_BIT=1,ST_CHANNEL_W=2,ST_DATA_W=104,SUPPRESS_0_BYTEEN_RSP=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_merlin_master_agent:16.0:ADDR_MAP=&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot;?&gt;
&lt;address_map&gt;
&lt;slave
id=&quot;0&quot;
name=&quot;sdram_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000004000000&quot;
end=&quot;0x00000000008000000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
,AV_BURSTBOUNDARIES=0,AV_BURSTCOUNT_W=5,AV_LINEWRAPBURSTS=0,BURSTWRAP_VALUE=1,CACHE_VALUE=0,ID=1,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),PKT_ADDR_H=67,PKT_ADDR_L=36,PKT_ADDR_SIDEBAND_H=85,PKT_ADDR_SIDEBAND_L=85,PKT_BEGIN_BURST=87,PKT_BURSTWRAP_H=79,PKT_BURSTWRAP_L=79,PKT_BURST_SIZE_H=82,PKT_BURST_SIZE_L=80,PKT_BURST_TYPE_H=84,PKT_BURST_TYPE_L=83,PKT_BYTEEN_H=35,PKT_BYTEEN_L=32,PKT_BYTE_CNT_H=78,PKT_BYTE_CNT_L=74,PKT_CACHE_H=98,PKT_CACHE_L=95,PKT_DATA_H=31,PKT_DATA_L=0,PKT_DATA_SIDEBAND_H=86,PKT_DATA_SIDEBAND_L=86,PKT_DEST_ID_H=90,PKT_DEST_ID_L=90,PKT_ORI_BURST_SIZE_H=103,PKT_ORI_BURST_SIZE_L=101,PKT_PROTECTION_H=94,PKT_PROTECTION_L=92,PKT_QOS_H=88,PKT_QOS_L=88,PKT_RESPONSE_STATUS_H=100,PKT_RESPONSE_STATUS_L=99,PKT_SRC_ID_H=89,PKT_SRC_ID_L=89,PKT_THREAD_ID_H=91,PKT_THREAD_ID_L=91,PKT_TRANS_COMPRESSED_READ=68,PKT_TRANS_EXCLUSIVE=73,PKT_TRANS_LOCK=72,PKT_TRANS_POSTED=69,PKT_TRANS_READ=71,PKT_TRANS_WRITE=70,SECURE_ACCESS_BIT=1,ST_CHANNEL_W=2,ST_DATA_W=104,SUPPRESS_0_BYTEEN_RSP=0,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_merlin_slave_agent:16.0:AVS_BURSTCOUNT_SYMBOLS=0,AVS_BURSTCOUNT_W=2,AV_LINEWRAPBURSTS=0,ECC_ENABLE=0,ID=0,MAX_BURSTWRAP=1,MAX_BYTE_CNT=2,MERLIN_PACKET_FORMAT=ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0),PKT_ADDR_H=49,PKT_ADDR_L=18,PKT_BEGIN_BURST=69,PKT_BURSTWRAP_H=61,PKT_BURSTWRAP_L=61,PKT_BURST_SIZE_H=64,PKT_BURST_SIZE_L=62,PKT_BYTEEN_H=17,PKT_BYTEEN_L=16,PKT_BYTE_CNT_H=60,PKT_BYTE_CNT_L=56,PKT_DATA_H=15,PKT_DATA_L=0,PKT_DEST_ID_H=72,PKT_DEST_ID_L=72,PKT_ORI_BURST_SIZE_H=85,PKT_ORI_BURST_SIZE_L=83,PKT_PROTECTION_H=76,PKT_PROTECTION_L=74,PKT_RESPONSE_STATUS_H=82,PKT_RESPONSE_STATUS_L=81,PKT_SRC_ID_H=71,PKT_SRC_ID_L=71,PKT_SYMBOL_W=8,PKT_TRANS_COMPRESSED_READ=50,PKT_TRANS_LOCK=54,PKT_TRANS_POSTED=51,PKT_TRANS_READ=53,PKT_TRANS_WRITE=52,PREVENT_FIFO_OVERFLOW=1,ST_CHANNEL_W=2,ST_DATA_W=86,SUPPRESS_0_BYTEEN_CMD=1,USE_READRESPONSE=0,USE_WRITERESPONSE=0)(altera_avalon_sc_fifo:16.0:BITS_PER_SYMBOL=87,CHANNEL_WIDTH=0,EMPTY_LATENCY=1,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=8,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=0,USE_PACKETS=1,USE_STORE_FORWARD=0)(altera_avalon_sc_fifo:16.0:BITS_PER_SYMBOL=18,CHANNEL_WIDTH=0,EMPTY_LATENCY=3,ENABLE_EXPLICIT_MAXCHANNEL=false,ERROR_WIDTH=0,EXPLICIT_MAXCHANNEL=0,FIFO_DEPTH=8,SYMBOLS_PER_BEAT=1,USE_ALMOST_EMPTY_IF=0,USE_ALMOST_FULL_IF=0,USE_FILL_LEVEL=0,USE_MEMORY_BLOCKS=1,USE_PACKETS=0,USE_STORE_FORWARD=0)(altera_merlin_router:16.0:CHANNEL_ID=1,DECODER_TYPE=0,DEFAULT_CHANNEL=0,DEFAULT_DESTID=0,DEFAULT_RD_CHANNEL=-1,DEFAULT_WR_CHANNEL=-1,DESTINATION_ID=0,END_ADDRESS=0x8000000,MEMORY_ALIASING_DECODE=0,MERLIN_PACKET_FORMAT=ori_burst_size(103:101) response_status(100:99) cache(98:95) protection(94:92) thread_id(91) dest_id(90) src_id(89) qos(88) begin_burst(87) data_sideband(86) addr_sideband(85) burst_type(84:83) burst_size(82:80) burstwrap(79) byte_cnt(78:74) trans_exclusive(73) trans_lock(72) trans_read(71) trans_write(70) trans_posted(69) trans_compressed_read(68) addr(67:36) byteen(35:32) data(31:0),NON_SECURED_TAG=1,PKT_ADDR_H=67,PKT_ADDR_L=36,PKT_DEST_ID_H=90,PKT_DEST_ID_L=90,PKT_PROTECTION_H=94,PKT_PROTECTION_L=92,PKT_TRANS_READ=71,PKT_TRANS_WRITE=70,SECURED_RANGE_LIST=0,SECURED_RANGE_PAIRS=0,SLAVES_INFO=0:1:0x4000000:0x8000000:both:1:0:0:1,SPAN_OFFSET=,START_ADDRESS=0x4000000,ST_CHAN
instancePathKey="Qsys:.:mm_interconnect_1"
kind="altera_mm_interconnect"
version="16.0"
name="Qsys_mm_interconnect_1">
<parameter name="AUTO_DEVICE" value="10M50DAF484C7G" />
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="" />
<parameter
name="COMPOSE_CONTENTS"
value="add_instance {alt_vip_vfb_0_read_master_translator} {altera_merlin_master_translator};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ADDRESS_W} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_DATA_W} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BURSTCOUNT_W} {3};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BYTEENABLE_W} {4};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_ADDRESS_W} {32};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_BURSTCOUNT_W} {5};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_READLATENCY} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_WRITE_WAIT} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_READ_WAIT} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_DATA_HOLD} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_SETUP_WAIT} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READDATA} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WRITEDATA} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READ} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WRITE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BEGINBURSTTRANSFER} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BEGINTRANSFER} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BYTEENABLE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_CHIPSELECT} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_ADDRESS} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_BURSTCOUNT} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_DEBUGACCESS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_CLKEN} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READDATAVALID} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WAITREQUEST} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_LOCK} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {USE_WRITERESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_SYMBOLS_PER_WORD} {4};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ADDRESS_SYMBOLS} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_CONSTANT_BURST_BEHAVIOR} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_CONSTANT_BURST_BEHAVIOR} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_MAX_PENDING_READ_TRANSACTIONS} {64};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BURSTBOUNDARIES} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_INTERLEAVEBURSTS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_BITS_PER_SYMBOL} {8};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ISBIGENDIAN} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ADDRESSGROUP} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {UAV_ADDRESSGROUP} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_REGISTEROUTGOINGSIGNALS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_REGISTERINCOMINGSIGNALS} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_translator} {AV_ALWAYSBUR
&lt;address_map&gt;
&lt;slave
id=&quot;0&quot;
name=&quot;sdram_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000004000000&quot;
end=&quot;0x00000000008000000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {ID} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {BURSTWRAP_VALUE} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_read_master_agent} {USE_WRITERESPONSE} {0};add_instance {alt_vip_vfb_0_write_master_agent} {altera_merlin_master_agent};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ORI_BURST_SIZE_H} {103};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ORI_BURST_SIZE_L} {101};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_RESPONSE_STATUS_H} {100};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_RESPONSE_STATUS_L} {99};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_QOS_H} {88};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_QOS_L} {88};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_SIDEBAND_H} {86};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_SIDEBAND_L} {86};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_SIDEBAND_H} {85};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_SIDEBAND_L} {85};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_TYPE_H} {84};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_TYPE_L} {83};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_CACHE_H} {98};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_CACHE_L} {95};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_THREAD_ID_H} {91};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_THREAD_ID_L} {91};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_SIZE_H} {82};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURST_SIZE_L} {80};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_EXCLUSIVE} {73};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_LOCK} {72};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BEGIN_BURST} {87};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_PROTECTION_H} {94};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_PROTECTION_L} {92};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURSTWRAP_H} {79};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BURSTWRAP_L} {79};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTE_CNT_H} {78};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTE_CNT_L} {74};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_H} {67};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_ADDR_L} {36};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_COMPRESSED_READ} {68};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_POSTED} {69};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_WRITE} {70};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_TRANS_READ} {71};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_H} {31};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_DATA_L} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTEEN_H} {35};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_BYTEEN_L} {32};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_SRC_ID_H} {89};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {PKT_SRC_ID_L} {89};set_instance_parameter_value
&lt;address_map&gt;
&lt;slave
id=&quot;0&quot;
name=&quot;sdram_s1_translator.avalon_universal_slave_0&quot;
start=&quot;0x0000000004000000&quot;
end=&quot;0x00000000008000000&quot;
responds=&quot;1&quot;
user_default=&quot;0&quot; /&gt;
&lt;/address_map&gt;
};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {SUPPRESS_0_BYTEEN_RSP} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {ID} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {BURSTWRAP_VALUE} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {CACHE_VALUE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {SECURE_ACCESS_BIT} {1};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {alt_vip_vfb_0_write_master_agent} {USE_WRITERESPONSE} {0};add_instance {sdram_s1_agent} {altera_merlin_slave_agent};set_instance_parameter_value {sdram_s1_agent} {PKT_ORI_BURST_SIZE_H} {85};set_instance_parameter_value {sdram_s1_agent} {PKT_ORI_BURST_SIZE_L} {83};set_instance_parameter_value {sdram_s1_agent} {PKT_RESPONSE_STATUS_H} {82};set_instance_parameter_value {sdram_s1_agent} {PKT_RESPONSE_STATUS_L} {81};set_instance_parameter_value {sdram_s1_agent} {PKT_BURST_SIZE_H} {64};set_instance_parameter_value {sdram_s1_agent} {PKT_BURST_SIZE_L} {62};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_LOCK} {54};set_instance_parameter_value {sdram_s1_agent} {PKT_BEGIN_BURST} {69};set_instance_parameter_value {sdram_s1_agent} {PKT_PROTECTION_H} {76};set_instance_parameter_value {sdram_s1_agent} {PKT_PROTECTION_L} {74};set_instance_parameter_value {sdram_s1_agent} {PKT_BURSTWRAP_H} {61};set_instance_parameter_value {sdram_s1_agent} {PKT_BURSTWRAP_L} {61};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTE_CNT_H} {60};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTE_CNT_L} {56};set_instance_parameter_value {sdram_s1_agent} {PKT_ADDR_H} {49};set_instance_parameter_value {sdram_s1_agent} {PKT_ADDR_L} {18};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_COMPRESSED_READ} {50};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_POSTED} {51};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_WRITE} {52};set_instance_parameter_value {sdram_s1_agent} {PKT_TRANS_READ} {53};set_instance_parameter_value {sdram_s1_agent} {PKT_DATA_H} {15};set_instance_parameter_value {sdram_s1_agent} {PKT_DATA_L} {0};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTEEN_H} {17};set_instance_parameter_value {sdram_s1_agent} {PKT_BYTEEN_L} {16};set_instance_parameter_value {sdram_s1_agent} {PKT_SRC_ID_H} {71};set_instance_parameter_value {sdram_s1_agent} {PKT_SRC_ID_L} {71};set_instance_parameter_value {sdram_s1_agent} {PKT_DEST_ID_H} {72};set_instance_parameter_value {sdram_s1_agent} {PKT_DEST_ID_L} {72};set_instance_parameter_value {sdram_s1_agent} {PKT_SYMBOL_W} {8};set_instance_parameter_value {sdram_s1_agent} {ST_CHANNEL_W} {2};set_instance_parameter_value {sdram_s1_agent} {ST_DATA_W} {86};set_instance_parameter_value {sdram_s1_agent} {AVS_BURSTCOUNT_SYMBOLS} {0};set_instance_parameter_value {sdram_s1_agent} {AVS_BURSTCOUNT_W} {2};set_instance_parameter_value {sdram_s1_agent} {AV_LINEWRAPBURSTS} {0};set_instance_parameter_value {sdram_s1_agent} {MERLIN_PACKET_FORMAT} {ori_burst_size(85:83) response_status(82:81) cache(80:77) protection(76:74) thread_id(73) dest_id(72) src_id(71) qos(70) begin_burst(69) data_sideband(68) addr_sideband(67) burst_type(66:65) burst_size(64:62) burstwrap(61) byte_cnt(60:56) trans_exclusive(55) trans_lock(54) trans_read(53) trans_write(52) trans_posted(51) trans_compressed_read(50) addr(49:18) byteen(17:16) data(15:0)};set_instance_parameter_value {sdram_s1_agent} {SUPPRESS_0_BYTEEN_CMD} {1};set_instance_parameter_value {sdram_s1_agent} {PREVENT_FIFO_OVERFLOW} {1};set_instance_parameter_value {sdram_s1_agent} {MAX_BYTE_CNT} {2};set_instance_parameter_value {sdram_s1_agent} {MAX_BURSTWRAP} {1};set_instance_parameter_value {sdram_s1_agent} {ID} {0};set_instance_parameter_value {sdram_s1_agent} {USE_READRESPONSE} {0};set_instance_parameter_value {sdram_s1_agent} {USE_WRITERESPONSE} {0};set_instance_parameter_value {sdram_s1_agent} {ECC_ENABLE} {0};add_instance {sdram_s1_agent_rsp_fifo} {altera_avalon_sc_fifo};set_instance_parameter_value {sdram_s1_agent_rsp_
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/merlin/altera_mm_interconnect/altera_mm_interconnect_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="mm_interconnect_1" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_irq_mapper:16.0:AUTO_DEVICE_FAMILY=MAX 10,IRQ_MAP=0:0,1:1,2:2,3:3,NUM_RCVRS=4,SENDER_IRQ_WIDTH=32"
instancePathKey="Qsys:.:irq_mapper"
kind="altera_irq_mapper"
version="16.0"
name="Qsys_irq_mapper">
<parameter name="NUM_RCVRS" value="4" />
<parameter name="IRQ_MAP" value="0:0,1:1,2:2,3:3" />
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
<parameter name="SENDER_IRQ_WIDTH" value="32" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/merlin/altera_irq_mapper/altera_irq_mapper_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator instantiator="Qsys" as="irq_mapper" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="altera_reset_controller:16.0:ADAPT_RESET_REQUEST=0,MIN_RST_ASSERTION_TIME=3,NUM_RESET_INPUTS=2,OUTPUT_RESET_SYNC_EDGES=deassert,RESET_REQUEST_PRESENT=0,RESET_REQ_EARLY_DSRT_TIME=1,RESET_REQ_WAIT_TIME=1,SYNC_DEPTH=2,USE_RESET_REQUEST_IN0=0,USE_RESET_REQUEST_IN1=0,USE_RESET_REQUEST_IN10=0,USE_RESET_REQUEST_IN11=0,USE_RESET_REQUEST_IN12=0,USE_RESET_REQUEST_IN13=0,USE_RESET_REQUEST_IN14=0,USE_RESET_REQUEST_IN15=0,USE_RESET_REQUEST_IN2=0,USE_RESET_REQUEST_IN3=0,USE_RESET_REQUEST_IN4=0,USE_RESET_REQUEST_IN5=0,USE_RESET_REQUEST_IN6=0,USE_RESET_REQUEST_IN7=0,USE_RESET_REQUEST_IN8=0,USE_RESET_REQUEST_IN9=0,USE_RESET_REQUEST_INPUT=0"
instancePathKey="Qsys:.:rst_controller"
kind="altera_reset_controller"
version="16.0"
name="altera_reset_controller">
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles>
<file
path="/home/ed/altera_lite/16.0/ip/altera/merlin/altera_reset_controller/altera_reset_controller_hw.tcl" />
</sourceFiles>
<childSourceFiles/>
<instantiator
instantiator="Qsys"
as="rst_controller,rst_controller_001,rst_controller_002" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_cusp_muxbin2:13.1:PORTS=2,WIDTH=32"
instancePathKey="Qsys:.:alt_vip_vfb_0:.:vfb_writer_packet_write_address_au_l_muxinst"
kind="alt_cusp_muxbin2"
version="13.1"
name="alt_cusp160_muxbin2">
<parameter name="WIDTH" value="32" />
<parameter name="PORTS" value="2" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles/>
<childSourceFiles/>
<instantiator
instantiator="Qsys_alt_vip_vfb_0"
as="vfb_writer_packet_write_address_au_l_muxinst,vfb_writer_packet_write_address_au_sload_muxinst,vfb_writer_first_packet_id_au_enable_muxinst,vfb_writer_first_packet_id_au_sload_muxinst,vfb_writer_next_to_last_packet_id_au_enable_muxinst,vfb_writer_overflow_trigger_au_sload_muxinst,vfb_writer_overflow_flag_reg_enable_muxinst,vfb_writer_word_counter_trigger_au_sload_muxinst,vfb_writer_field_interlace_reg_d_muxinst,vfb_writer_field_interlace_reg_enable_muxinst,vfb_writer_write_address_au_l_muxinst,vfb_reader_current_packet_id_au_l_muxinst,read_master_renable_trigger_muxinst,read_master_addr_muxinst,read_master_len_be_muxinst,write_master_len_be_muxinst,write_master_push_input_muxinst,vfb_writer_packets_sample_length_reg_d_muxinst,vfb_writer_packets_sample_length_reg_enable_muxinst,vfb_writer_packets_word_length_reg_d_muxinst,vfb_writer_packets_word_length_reg_enable_muxinst,packetdimensions_reg_d_muxinst,packetdimensions_reg_131_d_muxinst,packetdimensions_reg_1312_d_muxinst,packetdimensions_reg_1313_d_muxinst,output_reg_d_muxinst,output_reg_153_d_muxinst,output_reg_1532_d_muxinst,output_reg_1533_d_muxinst,output_reg_1534_d_muxinst,output_reg_1535_d_muxinst,msg_buffer_reply_id_3148_line162_d_muxinst,msg_buffer_id_3153_line170_d_muxinst,msg_field_width_id_3157_line172_d_muxinst,msg_field_height_id_3161_line174_d_muxinst,msg_field_interlace_id_3165_line176_d_muxinst,msg_samples_in_field_id_3169_line178_d_muxinst,msg_words_in_field_id_3173_line180_d_muxinst,msg_first_packet_id_3177_line222_d_muxinst,msg_next_to_last_packet_id_3181_line223_d_muxinst,vfb_reader_length_cnt_id_3256_line897_a_muxinst,vfb_reader_length_cnt_id_3265_line897_a_muxinst" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_au:13.1:FAMILY=11,LATENCY=1,NAME=vfb_writer_packet_write_address_au,OPTIMIZED=1,SIMULATION=0,WIDTH=32"
instancePathKey="Qsys:.:alt_vip_vfb_0:.:vfb_writer_packet_write_address_au"
kind="alt_au"
version="13.1"
name="alt_cusp160_au">
<parameter name="WIDTH" value="32" />
<parameter name="LATENCY" value="1" />
<parameter name="SIMULATION" value="0" />
<parameter name="OPTIMIZED" value="1" />
<parameter name="FAMILY" value="11" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles/>
<childSourceFiles/>
<instantiator
instantiator="Qsys_alt_vip_vfb_0"
as="vfb_writer_packet_write_address_au,vfb_writer_first_packet_id_au,vfb_writer_next_to_last_packet_id_au,vfb_writer_overflow_trigger_au,vfb_writer_length_counter_au,vfb_writer_word_counter_au,vfb_writer_word_counter_trigger_au,vfb_writer_write_address_au,vfb_reader_read_address_au,vfb_reader_packet_read_address_au,vfb_reader_current_packet_id_au,wrap_packet_id_id_3247_line1077,vfb_reader_length_cnt_4_id_3254_line897,vfb_reader_length_cnt_id_3256_line897,vfb_reader_length_cnt_id_3265_line897" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_reg:13.1:FAMILY=11,NAME=vfb_writer_overflow_flag_reg,OPTIMIZED=1,RESET_VALUE=0,WIDTH=1"
instancePathKey="Qsys:.:alt_vip_vfb_0:.:vfb_writer_overflow_flag_reg"
kind="alt_reg"
version="13.1"
name="alt_cusp160_reg">
<parameter name="RESET_VALUE" value="0" />
<parameter name="WIDTH" value="1" />
<parameter name="OPTIMIZED" value="1" />
<parameter name="FAMILY" value="11" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles/>
<childSourceFiles/>
<instantiator
instantiator="Qsys_alt_vip_vfb_0"
as="vfb_writer_overflow_flag_reg,vfb_writer_field_width_reg,vfb_writer_field_height_reg,vfb_writer_field_interlace_reg,vfb_writer_just_read_reg,vfb_writer_packets_sample_length_reg,vfb_writer_packets_word_length_reg,msg_packets_sample_length_reg,msg_packets_word_length_reg,packetdimensions_reg,packetdimensions_reg_131,packetdimensions_reg_1312,packetdimensions_reg_1313,output_reg,output_reg_153,output_reg_1532,output_reg_1533,output_reg_1534,output_reg_1535,output_reg_1536,output_reg_1537,output_reg_1538,msg_buffer_reply_id_3148_line162,msg_buffer_id_3153_line170,msg_field_width_id_3157_line172,msg_field_height_id_3161_line174,msg_field_interlace_id_3165_line176,msg_samples_in_field_id_3169_line178,msg_words_in_field_id_3173_line180,msg_first_packet_id_3177_line222,msg_next_to_last_packet_id_3181_line223,vfb_writer_buffer_id_3185_line228,write_to_read_buf_id_3188_line153,write_to_read_ack_id_3191_line164,vfb_writer_packet_base_address_0_id_3194_line204,isnotimagedata_0_id_3196_line144,iscontrolpacket_0_id_3198_line202,no_last_burst_0_id_3200_line301,no_last_burst_0_id_3204_line585,cond588_0_id_3206,drop_0_id_3208_line345,loop_repeat_0_id_3210_line367,burst_trigger_0_id_3212_line563,cond568_0_id_3214,cond290_0_id_3218,vfb_reader_buffer_id_3220_line865,read_to_write_ack_id_3223_line156,read_to_write_buf_id_3226_line160,vfb_reader_field_width_0_id_3229_line773,vfb_reader_samples_in_field_0_id_3231_line889,vfb_reader_field_height_0_id_3233_line775,vfb_reader_words_in_field_0_id_3235_line891,vfb_reader_field_interlace_0_id_3237_line777,vfb_reader_next_to_last_packet_id_0_id_3239_line876,reader_packets_sample_length_0_id_3241_line878,reader_packets_word_length_0_id_3243_line880,vfb_reader_packet_base_address_0_id_3245_line873,vfb_reader_length_cnt_3_id_3250_line897,vfb_reader_word_cnt_0_id_3252_line898,repeat_0_id_3259_line1140,loop_repeat_0_id_3261_line1148,cond1203_0_id_3263,cond1113_0_id_3268,ispreviousendpacket_0_comb_id_7828,justreadqueue_1_1_comb_id_7831,justreadqueue_2_1_comb_id_7834,justreadqueue_1_2_comb_id_7837,ispreviousendpacket_1_comb_id_7840,justreadaccesswire_3_comb_id_7843,justreadaccesswire_4_comb_id_7846,justreadqueue_1_4_comb_id_7849,justreadqueue_2_2_comb_id_7852,justreadqueue_1_5_comb_id_7855,ispreviousendpacket_2_comb_id_7858,justreadaccesswire_6_comb_id_7861,justreadaccesswire_7_comb_id_7864,justreadqueue_1_7_comb_id_7867,justreadqueue_2_3_comb_id_7870,justreadqueue_1_8_comb_id_7873,word_counter_trigger_flag_0_comb_id_7876,op_2226_comb_id_7879,op_2226_comb_0_id_7882,op_4405_comb_id_7885,op_4407_comb_id_7888,op_3252_comb_id_7894,op_3252_comb_0_id_7897,op_4420_comb_id_7900,op_4421_comb_id_7903,cond1113_0_stage_1_id_7906,cond1113_0_stage_2_id_7909,cond1113_0_stage_3_id_7912,empty_image_0_comb_id_7915,cond1203_0_stage_1_id_7918,cond1203_0_stage_2_id_7921,cond1203_0_stage_3_id_7924" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_cusp_muxhot16:13.1:PORTS=3,WIDTH=1"
instancePathKey="Qsys:.:alt_vip_vfb_0:.:vfb_writer_length_counter_au_enable_muxinst"
kind="alt_cusp_muxhot16"
version="13.1"
name="alt_cusp160_muxhot16">
<parameter name="WIDTH" value="1" />
<parameter name="PORTS" value="3" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles/>
<childSourceFiles/>
<instantiator
instantiator="Qsys_alt_vip_vfb_0"
as="vfb_writer_length_counter_au_enable_muxinst,vfb_writer_word_counter_au_enable_muxinst,vfb_writer_word_counter_au_enable_trigger_muxinst,vfb_writer_word_counter_trigger_au_enable_muxinst,vfb_writer_write_address_au_enable_trigger_muxinst,vfb_writer_just_read_reg_enable_muxinst,vfb_reader_packet_read_address_au_sload_muxinst,din_takeb_trigger_muxinst,dout_takeb_trigger_muxinst,dout_wdata_muxinst,dout_seteop_trigger_muxinst,dout_eop_muxinst,read_master_pull_pull_trigger_muxinst,write_master_cenable_trigger_muxinst,write_master_push_push_trigger_muxinst,pc0_usenextpc_trigger_muxinst,pc0_hold_trigger_muxinst,pc1_usenextpc_trigger_muxinst,pc1_hold_trigger_muxinst" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_avalon_st_input:13.1:DATATYPE=class sc_dt::sc_uint&lt;24&gt; ,END_PACKET_USED=1,FAMILY=11,NAME=din,OPTIMIZED=1,READY_LATENCY=1,SYM_PER_BEAT=3,WIDTH=24"
instancePathKey="Qsys:.:alt_vip_vfb_0:.:din"
kind="alt_avalon_st_input"
version="13.1"
name="alt_cusp160_avalon_st_input">
<parameter name="END_PACKET_USED" value="1" />
<parameter name="WIDTH" value="24" />
<parameter name="SYM_PER_BEAT" value="3" />
<parameter name="OPTIMIZED" value="1" />
<parameter name="READY_LATENCY" value="1" />
<parameter name="FAMILY" value="11" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles/>
<childSourceFiles/>
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="din" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_avalon_st_output:13.1:DATATYPE=class sc_dt::sc_uint&lt;24&gt; ,END_PACKET_USED=1,ISSIGNED=1,NAME=dout,READY_LATENCY=1,READY_USED=1,SYM_PER_BEAT=3,WIDTH=24"
instancePathKey="Qsys:.:alt_vip_vfb_0:.:dout"
kind="alt_avalon_st_output"
version="13.1"
name="alt_cusp160_avalon_st_output">
<parameter name="READY_USED" value="1" />
<parameter name="END_PACKET_USED" value="1" />
<parameter name="WIDTH" value="24" />
<parameter name="SYM_PER_BEAT" value="3" />
<parameter name="READY_LATENCY" value="1" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles/>
<childSourceFiles/>
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="dout" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_avalon_mm_bursting_master_fifo:13.1:ADDRESS_GROUP=1,ADDR_WIDTH=32,BURST_WIDTH=3,BYTEENABLE_USED=0,CLOCKS_ARE_SYNC=1,CMD_FIFO_DEPTH=1,DATA_WIDTH=32,FAMILY=11,INTERRUPT_USED=0,INTERRUPT_WIDTH=8,LEN_BE_WIDTH=19,NAME=read_master,OPTIMIZED=1,RDATA_FIFO_DEPTH=1024,RDATA_TARGET_BURST_SIZE=4,READ_USED=1,WDATA_FIFO_DEPTH=8,WDATA_TARGET_BURST_SIZE=0,WRITE_USED=0"
instancePathKey="Qsys:.:alt_vip_vfb_0:.:read_master"
kind="alt_avalon_mm_bursting_master_fifo"
version="13.1"
name="alt_cusp160_avalon_mm_bursting_master_fifo">
<parameter name="CMD_FIFO_DEPTH" value="1" />
<parameter name="INTERRUPT_USED" value="0" />
<parameter name="RDATA_TARGET_BURST_SIZE" value="4" />
<parameter name="RDATA_FIFO_DEPTH" value="1024" />
<parameter name="BYTEENABLE_USED" value="0" />
<parameter name="ADDRESS_GROUP" value="1" />
<parameter name="FAMILY" value="11" />
<parameter name="ADDR_WIDTH" value="32" />
<parameter name="CLOCKS_ARE_SYNC" value="1" />
<parameter name="DATA_WIDTH" value="32" />
<parameter name="WDATA_TARGET_BURST_SIZE" value="0" />
<parameter name="WDATA_FIFO_DEPTH" value="8" />
<parameter name="READ_USED" value="1" />
<parameter name="INTERRUPT_WIDTH" value="8" />
<parameter name="OPTIMIZED" value="1" />
<parameter name="WRITE_USED" value="0" />
<parameter name="BURST_WIDTH" value="3" />
<parameter name="LEN_BE_WIDTH" value="19" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles/>
<childSourceFiles/>
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="read_master,write_master" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_cusp_pulling_width_adapter:13.1:FAMILY=11,IN_WIDTH=32,NAME=read_master_pull,OPTIMIZED=1,OUT_WIDTH=24"
instancePathKey="Qsys:.:alt_vip_vfb_0:.:read_master_pull"
kind="alt_cusp_pulling_width_adapter"
version="13.1"
name="alt_cusp160_pulling_width_adapter">
<parameter name="OUT_WIDTH" value="24" />
<parameter name="IN_WIDTH" value="32" />
<parameter name="OPTIMIZED" value="1" />
<parameter name="FAMILY" value="11" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles/>
<childSourceFiles/>
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="read_master_pull" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_cusp_pushing_width_adapter:13.1:FAMILY=11,IN_WIDTH=24,NAME=write_master_push,OPTIMIZED=1,OUT_WIDTH=32"
instancePathKey="Qsys:.:alt_vip_vfb_0:.:write_master_push"
kind="alt_cusp_pushing_width_adapter"
version="13.1"
name="alt_cusp160_pushing_width_adapter">
<parameter name="OUT_WIDTH" value="32" />
<parameter name="IN_WIDTH" value="24" />
<parameter name="OPTIMIZED" value="1" />
<parameter name="FAMILY" value="11" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles/>
<childSourceFiles/>
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="write_master_push" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_pc:13.1:DECODE_LATENCY=2,FAMILY=11,INFER_MEMORY=1,LATENCY=3,NAME=pc0,OPTIMIZED=1,PCW_WIDTH=51,PC_NUM_WORDS=68,PC_WIDTH=7,PROGRAM_FILE=,PROGRAM_TRACE=Qsys_alt_vip_vfb_0_vfb_writer_vfb_writer.trace"
instancePathKey="Qsys:.:alt_vip_vfb_0:.:pc0"
kind="alt_pc"
version="13.1"
name="alt_cusp160_pc">
<parameter name="INFER_MEMORY" value="1" />
<parameter name="PC_WIDTH" value="7" />
<parameter name="PCW_WIDTH" value="51" />
<parameter name="PROGRAM_FILE" value="" />
<parameter name="DECODE_LATENCY" value="2" />
<parameter name="LATENCY" value="3" />
<parameter name="PC_NUM_WORDS" value="68" />
<parameter name="OPTIMIZED" value="1" />
<parameter
name="PROGRAM_TRACE"
value="Qsys_alt_vip_vfb_0_vfb_writer_vfb_writer.trace" />
<parameter name="FAMILY" value="11" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles/>
<childSourceFiles/>
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="pc0,pc1" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_cmp:13.1:FAMILY=11,NAME=fu_id_4494_line325_93,OPTIMIZED=1,WIDTH=2"
instancePathKey="Qsys:.:alt_vip_vfb_0:.:fu_id_4494_line325_93"
kind="alt_cmp"
version="13.1"
name="alt_cusp160_cmp">
<parameter name="WIDTH" value="2" />
<parameter name="OPTIMIZED" value="1" />
<parameter name="FAMILY" value="11" />
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles/>
<childSourceFiles/>
<instantiator
instantiator="Qsys_alt_vip_vfb_0"
as="fu_id_4494_line325_93,fu_id_4510_line325_52,fu_id_4526_line201_52,fu_id_4696_line202_58,fu_id_4890_line330_94,fu_id_4899_line331_96,fu_id_4982_line639_55,fu_id_5210_line696_38,fu_id_5669_line510_66,fu_id_5804_line563_105,fu_id_5987_line933_38,fu_id_6225_line1062_114,fu_id_6241_line1063_112,fu_id_6257_line1078_53,fu_id_6266_line1094_53,fu_id_6323_line1188_29,fu_id_6458_line1248_53,fu_id_6704_line1126_52" />
<messages/>
</entity>
<entity
path="submodules/"
parameterizationKey="alt_cusp_testbench_clock:13.1:"
instancePathKey="Qsys:.:dut:.:clocksource"
kind="alt_cusp_testbench_clock"
version="13.1"
name="alt_cusp160_clock_reset">
<generatedFiles/>
<childGeneratedFiles/>
<sourceFiles/>
<childSourceFiles/>
<instantiator instantiator="Qsys_alt_vip_vfb_0" as="clocksource" />
<messages/>
</entity>
</deploy>